Noise-Masking Cryptosystem Using Watermark and Chain Generation for EEG Measurement with Compressed Sensing

Ryota Tsunaga, Daisuke Kanemoto, Tetsuya Hirose

2024 IEEE International Conference on Consumer Electronics (ICCE)　2024/01/06　Research paper (international conference proceedings)

Sub-60-mV Charge Pump and its Driver Circuit for Extremely Low-Voltage Thermoelectric Energy Harvesting

Hikaru SEBE, Daisuke KANEMOTO, Tetsuya HIROSE

IEICE Transactions on Electronics　2024　Research paper (scientific journal)

Programmable Differential Bandgap Reference Circuit for Ultra-Low-Power CMOS LSIs

Yoshinori ITOTAGAWA, Koma ATSUMI, Hikaru SEBE, Daisuke KANEMOTO, Tetsuya HIROSE

IEICE Transactions on Electronics　2024　Research paper (scientific journal)

Sub-30-mV-Supply, Fully Integrated Ring Oscillator Consisting of Recursive Stacking Body-Bias Inverters for Extremely Low-Voltage Energy Harvesting

Hikaru Sebe, Tomohisa Okumura, Shintaro Sumi, Daisuke Kanemoto, Po-Hung Chen, Tetsuya Hirose

ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)　2023/09/11　Research paper (international conference proceedings)

Low Quiescent Current LDO with FVF-Based PSRR Enhanced Circuit for EEG Recording Wearable Devices

Kenji Mii, Daisuke Kanemoto, Tetsuya Hirose

Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials　2023/09/07　Research paper (international conference proceedings)

An Ultra-Low Power Low-Dropout Regulator with a Load Current Tracking Bias Current Generator

Yosuke Mizuno, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose

Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials　2023/09/07　Research paper (international conference proceedings)

A sub-50-mV supply, recursive stacking body bias NAND gate for extremely low-voltage energy harvesting

Shintaro Sumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose

Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials　2023/09/07　Research paper (international conference proceedings)

Low Quiescent Current Capacitively-coupled Chopper Instrumentation Amplifier in EEG Recording Wearable Devices for Compressed Sensing Framework

Kenji Mii, Daisuke Kanemoto, Tetsuya Hirose

Extended Abstracts of the 2023 International Conference on Solid State Devices and Materials　2023/09/07　Research paper (international conference proceedings)

Random Undersampling Wireless EEG Measurement Device using a Small TEG

Takuya Miyata, Daisuke Kanemoto, Tetsuya Hirose

2023 IEEE International Symposium on Circuits and Systems (ISCAS)　2023/05/21　Research paper (international conference proceedings)

A Programmable Differential Bandgap Reference for Ultra-Low-Power IoT Edge Node Devices

Yoshinori Itotagawa, Koma Atsumi, Hikaru Sebe, Daisuke Kanemoto, Tetsuya Hirose

2023 IEEE International Symposium on Circuits and Systems (ISCAS)　2023/05/21　Research paper (international conference proceedings)

EEG Measurements with Compressed Sensing Utilizing EEG Signals as the Basis Matrix

Daisuke Kanemoto, Tetsuya Hirose

2023 IEEE International Symposium on Circuits and Systems (ISCAS)　2023/05/21　Research paper (international conference proceedings)

13.3 A Triturated Sensing System

Noriyuki Miura, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Tetsuya Hirose, Takaaki Okidono, Takuji Miki, Makoto Nagata

2023 IEEE International Solid- State Circuits Conference (ISSCC)　2023/02/19　Research paper (international conference proceedings)

Fully-integrated switched-capacitor voltage boost converter with digital maximum power point tracking for low-voltage energy harvesting

Kaori Matsumoto, Ryuki Ikeda, Hikaru Sebe, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto, Tetsuya Hirose

Japanese Journal of Applied Physics　Vol. 62　No. SC　p. SC1071-SC1071　2023/02/17　Research paper (scientific journal)

Switched-capacitor voltage buck converter with variable step-down and switching frequency controllers for low-power and high-efficiency IoT devices

Ryo Matsuzuka, Shuto Kanzaki, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Daisuke Kanemoto, Tetsuya Hirose

Japanese Journal of Applied Physics　2023/02/08　Research paper (scientific journal)

Compressed Sensing EEG Measurement Technique with Normally Distributed Sampling Series

Yuki OKABE, Daisuke KANEMOTO, Osamu MAIDA, Tetsuya HIROSE

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E105.A　No. 10　p. 1429-1433　2022/10/01　Research paper (scientific journal)

Fully Integrated Switched-Capacitor Buck Converter with Variable Ratio and Frequency Controllers for Ultra-Low Power LSI Systems

R. Matsuzuka, S. Kanzaki, K. Matsumoto, N. Kuroki, M. Numa, D. Kanemoto, T. Hirose

Extended abstract of the 2022 International Conference on Solid State Devices and Materials (SSDM 2022)　Vol. K-9-06　p. 798-799　2022/09　Research paper (conference, symposium, etc.)

Switched-Capacitor Voltage Boost Converter with Digital Maximum Power Point Tracking for Low-Voltage Energy Harvesting

K. Matsumoto, R. Ikeda, H. Sebe, N. Kuroki, M. Numa, D. Kanemoto, T. Hirose

Extended abstract of the 2022 International Conference on Solid State Devices and Materials (SSDM 2022)　Vol. K-9-07　p. 800-801　2022/09　Research paper (international conference proceedings)

Characterization of deep interface states in SiO2/B-doped diamond using the transient photocapacitance method

Osamu Maida, Daiskuke Kanemoto, Tetsuya Hirose

Thin Solid Films　Vol. 741　p. 139026-139026　2022/01　Research paper (scientific journal)

Automated Fish Bone Detection in X‐Ray Images with Convolutional Neural Network and Synthetic Image Generation

Kazuya Urazoe, Nobutaka Kuroki, Akihiro Maenaka, Hironori Tsutsumi, Mizuki Iwabuchi, Kosuke Fuchuya, Tetsuya Hirose, Masahiro Numa

IEEJ Transactions on Electrical and Electronic Engineering　Vol. 16　No. 11　p. 1510-1517　2021/11　Research paper (scientific journal)

A self-bias NAND gate and its application to non-overlapping clock generator for extremely low-voltage CMOS LSIs

Hikaru Sebe, Kaori Matsumoto, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

Japanese Journal of Applied Physics　Vol. 60　No. SB　p. SBBL06-SBBL06　2021/05/01　Research paper (scientific journal)

A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs

Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

IEICE Electronics Express　Vol. 18　No. 6　p. 20210065-20210065　2021/03/25　Research paper (scientific journal)

Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning

Kazuya URAZOE, Nobutaka KUROKI, Yu KATO, Shinya OHTANI, Tetsuya HIROSE, Masahiro NUMA

IEICE Transactions on Information and Systems　Vol. E104.D　No. 1　p. 183-193　2021/01/01　Research paper (scientific journal)

Combination of Convolutional Neural Network Architecture and its Learning Method for <scp>Rotation‐Invariant</scp> Handwritten Digit Recognition

Kazuya Urazoe, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

IEEJ Transactions on Electrical and Electronic Engineering　Vol. 16　No. 1　p. 161-163　2021/01　Research paper (scientific journal)

Image Quality Improvement for Capsule Endoscopy Based on Compressed Sensing with K-SVD Dictionary Learning

Yuuki HARADA, Daisuke KANEMOTO, Takahiro INOUE, Osamu MAIDA, Tetsuya HIROSE

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E105.A　No. 4　p. 743-747　2021　Research paper (scientific journal)

A 115× Conversion-Ratio Thermoelectric Energy-Harvesting Battery Charger for the Internet of Things

Ming-Jie Chung, Tetsuya Hirose, Takahito Ono, Po-Hung Chen

IEEE Transactions on Circuits and Systems I: Regular Papers　Vol. 67　No. 11　p. 4110-4121　2020/11　Research paper (scientific journal)

Design of Switched-Capacitor Voltage Boost Converter for Low-Voltage and Low-Power Energy Harvesting Systems

Tetsuya HIROSE, Yuichiro NAKAZAWA

IEICE Transactions on Electronics　Vol. E103.C　No. 10　p. 446-457　2020/10/01　Research paper (scientific journal)

A Self-Bias NAND Gate and its Application to Non-Overlapping Clock Generator for Extremely Low-Voltage CMOS LSIs

H. Sebe, K. Matsumoto, R. Matsuzuka, O. Maida, D. Kanemoto, T. Hirose

Extended abstract of the 2020 International Conference on Solid State Devices and Materials (SSDM 2020)　Vol. A-7-02　p. 65-66　2020/09　Research paper (international conference proceedings)

Detecting tampered region in video using LSTM and U-Net

Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

ELECTRONICS AND COMMUNICATIONS IN JAPAN　2020/08　Research paper (scientific journal)

Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution

Kazuya URAZOE, Nobutaka KUROKI, Yu KATO, Shinya OHTANI, Tetsuya HIROSE, Masahiro NUMA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E103.A　No. 7　p. 955-958　2020/07/01　Research paper (scientific journal)

Detecting tampered regions in JPEG images via CNN

Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)　2020/06　Research paper (international conference proceedings)

A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting

Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

2020 18th IEEE International New Circuits and Systems Conference (NEWCAS)　2020/06　Research paper (international conference proceedings)

An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems

Kaori Matsumoto, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

IEICE ELECTRONICS EXPRESS　Vol. 17　No. 11　2020/06　Research paper (scientific journal)

Sub-50-mV Charge Pump and its Driver for Extremely Low-Voltage Thermal Energy Harvesting

H. Sebe, D. Kanemoto, T. Hirose

Proceedings of the 2022 IEEE International Symposium on Circuits and Systems (ISCAS 2022)　p. 1-5　2020/05　Research paper (international conference proceedings)

Detecting Tampered Region in video using LSTM and U-Net

Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa

IEEJ Transactions on Electronics, Information and Systems　Vol. 140　No. 4　p. 476-483　2020/04/01　Research paper (scientific journal)

A 42 mV startup ring oscillator using gain-enhanced self-bias inverters for extremely low voltage energy harvesting

Ryo Matsuzuka, Tatsuya Terada, Kaori Matsumoto, Masatoshi Kitamura, Tetsuya Hirose

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 59　No. SG　p. SGGL01-SGGL01　2020/04　Research paper (scientific journal)

Rotation invariant-digits recognition with single convolutional neural networks

K. Urazoe, N. Kuroki, T. Hirose, M. Numa

Proceedings of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2020)　p. 618-621　2020/03　Research paper (international conference proceedings)

CNN-based segmentation and recognition of traffic signs with parameter regions

T. Haraguchi, N. Kuroki, T. Hirose, M. Numa

Proceedings of 2020 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2020)　p. 377-380　2020/03　Research paper (international conference proceedings)

Super-Resolution with Multi-Path Convolutional Neural Networks

Urazoe Kazuya, Kuroki Nobutaka, Kato Yu, Ohtani Shinya, Hirose Tetsuya, Numa Masahiro

IEEJ Transactions on Electronics, Information and Systems　Vol. 140　No. 6　p. 638-650　2020　Research paper (scientific journal)

An IoT Sensor Node SoC with Dynamic Power Scheduling for Sustainable Operation in Energy Harvesting Environment

Yuji Yano, Seiya Yoshida, Shintaro Izumi, Hiroshi Kawaguchi, Tetsuya Hirose, Masaya Miyahara, Teruki Someya, Kenichi Okada, Ippei Akita, Yoshihiko Kurui, Hideyuki Tomizawa, Masahiko Yoshimoto

2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)　p. 267-270　2019/11　Research paper (international conference proceedings)

An error diagnosis technique using ZDD to extract error location sets

H. Nakano, S. Ohmura, N. Kuroki, T. Hirose, M. Numa

The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)　p. 262-267　2019/10　Research paper (international conference proceedings)

Incremental approaches for locating design errors: averaging epi-groups and generating additional input patterns

S. Ohmura, H. Nakano, N. Kuroki, T. Hirose, M. Numa

The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)　p. 244-249　2019/10　Research paper (international conference proceedings)

A global placement method for RECON spare cells in ECO-friendly design style

J. Akashi, S. Hojo, N. Kuroki, T. Hirose, M. Numa

The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)　p. 158-163　2019/10　Research paper (international conference proceedings)

A 4ch CNN hardware architecture for image super-resolution

K. Suzuki, K. Mori, N. Kuroki, T. Hirose, M. Numa

The 22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019)　p. 46-50　2019/10　Research paper (international conference proceedings)

A 42-mV startup ring oscillator using self-bias inverters for extremely low voltage energy harvesting

R. Matsuzuka, T. Terada, K. Matsumoto, M. Kitamura, T. Hirose

Extended abstract of the 2019 International Conference on Solid State Devices and Materials (SSDM 2019)　Vol. M-5-03　2019/09　Research paper (international conference proceedings)

Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter

Masaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose

2019 26TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　p. 530-533　2019　Research paper (international conference proceedings)

An Area-Efficient Resistor-less On-Chip Frequency Reference for Ultra-Low Power Real-Time Clock Application

Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa

IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING　Vol. 13　No. 11　p. 1633-1641　2018/11　Research paper (scientific journal)

Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting

Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

Proceedings - IEEE International Symposium on Circuits and Systems　Vol. 2018-May　2018/04　Research paper (international conference proceedings)

A fully integrated, wide-load-range, high-power-conversion-efficiency switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit

Hiroki Asano, Tetsuya Hirose, Yuta Kojima, Nobutaka Kuroki, Masahiro Numa

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 57　No. 4　2018/04　Research paper (scientific journal)

A Sub-1-μs Start-Up Time, Fully-integrated 32-MHz relaxation oscillator for low-power intermittent systems

Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa

IEICE Transactions on Electronics　Vol. E101C　No. 3　p. 161-169　2018/03　Research paper (scientific journal)

An error diagnosis technique based on unsatisfiable cores to extract error locations sets

TAKEZAKI Ayano, OHMURA Syogo, KATAYAMA Naoki, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Proceedings of the 21st workshop on synthesis and system integration of mixed information technologies　p. 81-86　2018/03　Research paper (scientific journal)

Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting

Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)　2018　Research paper (international conference proceedings)

Super-resolution with horizontal and vertical convolutional neural networks

Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

IEEJ Transactions on Electronics, Information and Systems　Vol. 138　No. 7　p. 957-963　2018　Research paper (scientific journal)

A Multifunctional Sensor Node Sharing Coils in Wireless Power Supply, Wireless Communication and Distance Sensing Modes

Ryo Shirai, Tetsuya Hirose, Masanori Hashimoto

2018 16TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)　p. 152-156　2018　Research paper (international conference proceedings)

Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices

Shuto Kanzaki, Tetsuya Hirose, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa

2018 25TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　p. 209-212　2018　Research paper (international conference proceedings)

An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems

Kaori Matsumoto, Tetsuya Hirose, Hiroki Asano, Yuto Tsuji, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa

PROCEEDINGS OF THE 2018 26TH IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC)　Vol. 2018-October　p. 196-200　2018　Research paper (international conference proceedings)

IoTノード向けアンテナ組込型小体積高効率トランスミッタの開発

白井僚, 廣瀬哲也, 橋本昌宜

電子情報通信学会 集積回路研究会　2017/12　Research paper (other academic)

近傍界磁界通信・電界測距共用mm3級アンテナの実装と評価

白井僚, 河野仁, 廣瀬哲也, 橋本昌宜

電子情報通信学会 回路とシステム研究会　2017/12　Research paper (other academic)

Near-field dual-use antenna for magnetic-field based communication and electrical-field based distance sensing in mm3-class sensor node

Ryo Shirai, Jin Kono, Tetsuya Hirose, Masanori Hashimoto

Proceedings - IEEE International Symposium on Circuits and Systems　p. 124-127　2017/09/25　Research paper (international conference proceedings)

An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications

H. Asano, T. Hirose, T. Ozaki, N. Kuroki, M. Numa

Proceedings - IEEE International Symposium on Circuits and Systems　p. 477-480　2017/09/25　Research paper (international conference proceedings)

A wide load range switched capacitor DC-DC converter with adaptive bias comparator for ultra-low-power power management integrated circuit

ASANO Hiroki, HIROSE Tetsuya, KOJIMA Yuta, KUROKI Nobutaka, NUMA Masahiro

Extended abstract of the 2017 international conference on solid state devices and materials　p. 511-512　2017/09　Research paper (scientific journal)

An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs

Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Kyohei Shinonaga, Nobutaka Kuroki, Masahiro Numa

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS　Vol. 64　No. 8　p. 2026-2035　2017/08　Research paper (scientific journal)

Toward real-time 3D modeling system with cubic-millimeters wireless sensor nodes

Masanori Hashimoto, Ryo Shirai, Yuichi Itoh, Tetsuya Hirose

Proceedings of International Conference on ASIC　Vol. 2017-October　p. 1065-1068　2017/07/01　Research paper (international conference proceedings)

Ultralow-quiescent-current and wide-load-range low-dropout linear regulator with self-biasing technique for micropower battery management

Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 56　No. 4　2017/04　Research paper (scientific journal)

Segmentation and colorization of grayscale image using convolutional neural network

ARASHI Yuto, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017)　p. 1PM2-3-3　2017/03　Research paper (international conference proceedings)

Restoring defocus images with Wiener filter and convolutional neural network

NOHARA Hiroshi, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017)　p. 1AM2-1-4　2017/03　Research paper (international conference proceedings)

A study on point cloud registration with SIFT features

YAMAGUCHI Yudai, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of the 2017 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2017)　p. 3AM2-3-5　2017/03　Research paper (international conference proceedings)

Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems

H. Asano, T. Hirose, T. Miyoshi, K. Tsubaki, T. Ozaki, N. Kuroki, M. Numa

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC　p. 35-36　2017/02/16　Research paper (international conference proceedings)

Multi-Channel Convolutional Neural Networks for Image Super-Resolution

Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E100A　No. 2　p. 572-580　2017/02　Research paper (scientific journal)

Multi-channel convolutional neural networks for image super-resolution

Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E100A　No. 2　p. 572-580　2017/02　Research paper (scientific journal)

Near-Field Dual-Use Antenna for Magnetic-Field based Communication and Electrical-Field based Distance Sensing in mm(3)-Class Sensor Node

Ryo Shirai, Jin Kono, Tetsuya Hirose, Masanori Hashimoto

2017 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)　p. 124-127　2017　Research paper (international conference proceedings)

Dedicated Antenna Less Power Efficient OOK Transmitter for mm-Cubic IoT Nodes

Ryo Shirai, Tetsuya Hirose, Masanori Hashimoto

2017 47TH EUROPEAN MICROWAVE CONFERENCE (EUMC)　Vol. 2017-January　p. 101-104　2017　Research paper (international conference proceedings)

Impedance Matching in Magnetic-Coupling-Resonance Wireless Power Transfer for Small Implantable Devices

Sota Masuda, Tetsuya Hirose, Yuki Akihara, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

2017 IEEE WIRELESS POWER TRANSFER CONFERENCE (WPTC 2017)　p. 1-4　2017　Research paper (international conference proceedings)

An Ultra-Low-Power Supercapacitor Voltage Monitoring System for Low-Voltage Energy Harvesting

Takanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　Vol. 2018-January　p. 498-501　2017　Research paper (international conference proceedings)

A 0.1-0.6 V Input Range Voltage Boost Converter with Low-Leakage Driver for Low-Voltage Energy Harvesting

Yuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

2017 24TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　Vol. 2018-January　p. 502-505　2017　Research paper (international conference proceedings)

A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting

Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E99A　No. 12　p. 2491-2499　2016/12　Research paper (scientific journal)

A fully integrated, 1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems

H. Asano, T. Hirose, T. Miyoshi, K. Tsubaki, T. Ozaki, N. Kuroki, M. Numa

14th IEEE International NEWCAS Conference, NEWCAS 2016　p. 1-4　2016/10/20　Research paper (international conference proceedings)

A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability

H. Asano, T. Hirose, K. Tsubaki, T. Miyoshi, T. Ozaki, N. Kuroki, M. Numa

European Solid-State Circuits Conference　Vol. 2016-October　p. 149-152　2016/10/18　Research paper (international conference proceedings)

On component ratio of RECON spare cells for ECO-friendly design style

SAWAI Takeshi, TAKEZAKI Ayano, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)　p. 205-210　2016/10　Research paper (international conference proceedings)

Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting

Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 51　No. 10　p. 2398-2407　2016/10　Research paper (scientific journal)

An error diagnosis technique based on averaged EPI values to extract error locations sets

TAKEZAKI Ayano, SAWAI Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)　p. 317-322　2016/10　Research paper (international conference proceedings)

A hardware architecture to perform K-means clustering for learning-based super-resolution combining self-learning and prior-learning dictionaries

MURATA Daichi, KIRIYAMA Ayumi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Proceedings of the 20th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2016)　p. 268-273　2016/10　Research paper (international conference proceedings)

A self-biased low-dropout linear regulator for ultra-low power battery management

OZAKI Toshihiro, HIROSE Tetsuya, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

Extended abstract of the 2016 International Conference on Solid State Devices and Materials (SSDM 2016)　p. 463-464　2016/09　Research paper (other academic)

4出力の畳み込みニューラルネットワークを用いた超解像

KATO Yu, OHTANI Shinya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

第15回情報科学技術フォーラム（FIT2016）講演論文集　p. RI-005　2016/09　Research paper (conference, symposium, etc.)

極低入力電圧を昇圧するチャージポンプ回路の設計

TSUJI Yuto, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, OGUNI Kazumichi, KUROKI Nobutaka, NUMA Masahiro

第29回 回路とシステムワークショップ論文集　Vol. 29　p. 301-306　2016/05　Research paper (conference, symposium, etc.)

4並列の畳み込みニューラルネットワークを用いた超解像

OHTANI Shinya, KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

電子情報通信学会論文誌　Vol. J99-D　No. 5　p. 588-593　2016/05　Research paper (scientific journal)

A fully on-chip three-terminal switched-capacitor DC-DC converter for low-voltage CMOS LSIs

Yuta Kojima, Tetsuya Hirose, Keishi Tsubaki, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 55　No. 4　p. 04EF09-1-04EF09-5　2016/04　Research paper (scientific journal)

Locally weighted averaging for denoising of medical tomographic images

KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Journal of Signal Processing　Vol. 20　No. 4　p. 217-220　2016/04　Research paper (scientific journal)

Three dimensional NL-Means method for denoising continuous shooting photography

KOBORI Hirokazu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

RISP international workshop on nonlinear circuits　p. 570-573　2016/03　Research paper (international conference proceedings)

Noise reduction for medical tomographic images based on locally weighted averaging

KATO Yu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

RISP international workshop on nonlinear circuits　p. 566-569　2016/03　Research paper (international conference proceedings)

Crack extraction from noisy images with fractal dimension analysis

HANAKI Ryo, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

RISP international workshop on nonlinear circuits　p. 423-426　2016/03　Research paper (international conference proceedings)

Anomalous behavior detection in videos based on deformable part models

SUGIMOTO Tamotsu, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

RISP international workshop on nonlinear circuits　p. 419-422　2016/03　Research paper (international conference proceedings)

Image Super-Resolution with Multi-Channel Convolutional Neural Networks

Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

2016 14TH IEEE INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)　p. 1-4　2016　Research paper (international conference proceedings)

Highly-Efficient Power Transmitter Coil Design for Small Wireless Sensor Nodes

Souta Masuda, Tetsuya Hirose, Yuki Akihara, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

2016 INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP)　p. 512-513　2016　Research paper (international conference proceedings)

Analytical Study of Rectifier Circuit for Wireless Power Transfer Systems

Yuki Akihara, Tetsuya Hirose, Sota Masuda, Nobutaka Kuroki, Masahiro Numa, Masanori Hashimoto

2016 INTERNATIONAL SYMPOSIUM ON ANTENNAS AND PROPAGATION (ISAP)　p. 338-339　2016　Research paper (international conference proceedings)

A 0.38-mu W Stand-by Power, 50-nA-to-1-mA Load Current Range DC-DC Converter with Self-Biased Linear Regulator for Ultra-Low Power Battery Management

Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

2016 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC)　p. 225-228　2016　Research paper (international conference proceedings)

An energy-efficient 24T flip-flop consisting of standard CMOS gates for ultra-low power digital VLSIs

Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E98A　No. 12　p. 2600-2606　2015/12　Research paper (scientific journal)

A wireless power transfer system for small-sized sensor applications

AKIHARA Yuki, HIROSE Tetsuya, TANAKA Yuki, KUROKI Nobutaka, NUMA Masahiro, HASHIMOTO Masanori

Extended abstract of the 2015 international conference on solid state devices and materials　p. 154-155　2015/09　Research paper (international conference proceedings)

A fully on-chip 3-terminal switched-capacitor DC-DC converter with startup/fail-safe circuit

KOJIMA Yuta, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

Extended abstract of the 2015 international conference on solid state devices and materials　p. 158-159　2015/09　Research paper (international conference proceedings)

適応バイアス技術を用いた超低電力・高速オペアンプの高性能化

TSUBOI Jyunki, HIROSE Tetsuya, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

第28回 回路とシステムワークショップ　Vol. 28　p. 94-99　2015/08　Research paper (conference, symposium, etc.)

小型センサデバイスに向けた無線給電システムの設計

AKIHARA Yuki, HIROSE Tetsuya, TANAKA Yuki, KUROKI Nobutaka, NUMA Masahiro, HASHIMOTO Masanori

第28回 回路とシステムワークショップ　Vol. 28　p. 258-263　2015/08　Research paper (conference, symposium, etc.)

高耐圧CMOSプロセスによる超低電力・適応バイアス型シリーズレギュレータ

SADO Kenji, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, MATSUMOTO Kaori, KUROKI Nobutaka, NUMA Masahiro

第28回 回路とシステムワークショップ　Vol. 28　p. 264-269　2015/08　Research paper (conference, symposium, etc.)

高速起動を特徴とするフルオンチップ32 MHz弛張発振回路

MIYOSHI Taro, HIROSE Tetsuya, TSUBAKI Keishi, ASANO Hiroki, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

第28回 回路とシステムワークショップ　Vol. 28　p. 70-75　2015/08　Research paper (conference, symposium, etc.)

スイッチトキャパシタ回路を用いたオンチップ電源回路の高効率化

KOJIMA Yuta, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, ASANO Hiroki, KUROKI Nobutaka, NUMA Masahiro

第28回 回路とシステムワークショップ　Vol. 28　p. 270-275　2015/08　Research paper (conference, symposium, etc.)

サブスレッショルド領域動作に適したスタンダードセルのサイジング手法

SHINONAGA Kyohei, HIROSE Tetsuya, SHIZUKU Yuzuru, MATSUZUKA Ryo, KUROKI Nobutaka, NUMA Masahiro

第28回 回路とシステムワークショップ　Vol. 28　p. 88-93　2015/08　Research paper (conference, symposium, etc.)

A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs

Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa

Proceedings - IEEE International Symposium on Circuits and Systems　Vol. 2015-July　p. 2948-2951　2015/07/27　Research paper (international conference proceedings)

A 32-kHz real-time clock oscillator with on-chip PVT variation compensation circuit for ultra-low power MCUs

Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEICE Transactions on Electronics　Vol. E98C　No. 5　p. 446-453　2015/05/01　Research paper (scientific journal)

Nano watt power rail-to-rail CMOS amplifier with adaptive biasing circuits for ultralow-power analog LSIs

Toshihiro Ozaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 54　No. 4　p. 1-7　2015/04　Research paper (scientific journal)

Object Detection with Deformable Part Models and Deep Convolutional Neural Networks

OHTANI Shinya, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015)　p. 218-221　2015/03　Research paper (international conference proceedings)

Bayer Demosaicing with Example-Based Super-Resolution

MIYAHARA Kyousuke, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015)　p. 421-424　2015/03　Research paper (international conference proceedings)

Architecture of a JPEG Noise Reduction Method with Total Variation

ONISHI Toshihito, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of 2015 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2015)　p. 353-356　2015/03　Research paper (international conference proceedings)

An ECO-friendly design style based on reconfigurable cells

KABATA Yudai, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Proceedings of the 19th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2015)　p. 319-324　2015/03　Research paper (international conference proceedings)

A 0.19-V Minimum Input Low Energy Level Shifter for Extremely Low-Voltage VLSIs

Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa

2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)　p. 2948-2951　2015　Research paper (international conference proceedings)

Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation

Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

IEICE ELECTRONICS EXPRESS　Vol. 12　No. 4　p. 1-10　2015　Research paper (scientific journal)

A 0.21-V Minimum Input, 73.6% Maximum Efficiency, Fully Integrated 3-Terminal Voltage Converter with MPPT for Low-Voltage Energy Harvesters

Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

2015 20TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)　p. 30-31　2015　Research paper (international conference proceedings)

A Fully-Integrated, High-Conversion-Ratio and Dual-Output Voltage Boost Converter with MPPT for Low-Voltage Energy Harvesting

Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa

2015 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC)　p. 297-300　2015　Research paper (international conference proceedings)

学習型超解像による4倍拡大映像出力ハードウェアの実現と辞書探索回路の規模削減

MATSUZUKA Ryo, KIRIYAMA Ayumi, MICHIBATA Kohei, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

情報処理学会 第13回情報科学技術フォーラム（FIT2014）　p. 173-174　2014/09　Research paper (conference, symposium, etc.)

A Nano-Watt Power Rail-to-Rail CMOS Amplifier with Adaptive Biasing for Ultra-Low Power Analog LSIs

OZAKI Toshihiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

Extended abstract of the 2014 International Conference on Solid State Devices and Materials (SSDM 2014)　p. 964-965　2014/09　Research paper (other academic)

電力変換効率の負荷電流依存性を考慮したオンチップチャージポンプの高効率化

ASANO Hiroki, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

第27 回 回路とシステムワークショップ　Vol. 27　p. 25-30　2014/08　Research paper (conference, symposium, etc.)

時間計測アプリケーシ ョンに向けた超低電力弛張発振回路

TSUBAKI Keishi, HIROSE Tetsuya, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

電子情報通信学会 集積回路研究会　p. 99-104　2014/08　Research paper (conference, symposium, etc.)

高耐圧CMOSトランジスタによる低電力バンドギャップリファレンス回路

MATSUMOTO Kaori, HIROSE Tetsuya, TSUBAKI Keishi, KUROKI Nobutaka, NUMA Masahiro

第27 回 回路とシステムワークショップ　p. 31-35　2014/08　Research paper (conference, symposium, etc.)

PWM制御方式を用いた時間分解能型ADコンバータの低電力化

OGUNI Kazumichi, HIROSE Tetsuya, TSUBAKI Keishi, OZAKI Toshihiro, KUROKI Nobutaka, NUMA Masahiro

第27 回 回路とシステムワークショップ　Vol. 27　p. 300-305　2014/08　Research paper (conference, symposium, etc.)

A fully on-chip, 6.66-kHz, 320-nA, 56 ppm/ °c, CMOS relaxation oscillator with PVT variation compensation circuit

Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa

IEICE Transactions on Electronics　Vol. E97-C　No. 6　p. 512-518　2014/06　Research paper (scientific journal)

Scene Segmentation for TV Programs Based on a Bag-of-VisualWords Model

IJIRI Shota, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)　p. 41-44　2014/03　Research paper (international conference proceedings)

Estimation of Visual Importance Map for Image Quality Assessment

IZUMI Naoyuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)　p. 501-504　2014/03　Research paper (international conference proceedings)

A Scene Matching Method for TV Programs Based on Audio Features

OURA Junki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)　p. 361-364　2014/03　Research paper (international conference proceedings)

Architecture of Digital Zooming Function with Example-Based Hierarchical Super-Resolution

SUGAHARA Yuki, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

2014 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2014)　p. 301-304　2014/03　Research paper (international conference proceedings)

A 24-Transistor Static Flip-Flop Consisting of NORs and Inverters for Low-Power Digital VLSIs

Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada

2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS)　p. 137-140　2014　Research paper (international conference proceedings)

A 0.21-V Minimum Input, 73.6% Maximum Efficiency, Fully Integrated Voltage Boost Converter with MPPT for Low-Voltage Energy Harvesters

Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

PROCEEDINGS OF THE 40TH EUROPEAN SOLID-STATE CIRCUIT CONFERENCE (ESSCIRC 2014)　p. 255-258　2014　Research paper (international conference proceedings)

Technology remapping based on multiple solutions for post-mask functional ECO

KABATA Yudai, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013)　p. 253-258　2013/10　Research paper (international conference proceedings)

A technique for accelerating adaptive super resolution technique based on local features of images using GPU

KUGAI Kento, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013)　p. 170-175　2013/10　Research paper (international conference proceedings)

An error diagnosis technique using QBF solver to fix LUT functions

KATAYAMA Naoki, SAKAMOTO Hiroyuki, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013)　p. 28-33　2013/10　Research paper (international conference proceedings)

A memory-saving technique for 4K super-resolution circuit with binary tree dictionary

KIRIYAMA Ayumi, MATSUZUKA Ryo, MICHIBATA Kouhei, KITAYAMA Takahiro, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013)　p. 360-365　2013/10　Research paper (international conference proceedings)

A compact and energy-efficient Muller C-element for low-voltage asynchronous CMOS digital circuits

SHIZUKU Yuzuru, HIROSE Tetsuya, DANNO Yuya, KUROKI Nobutaka, NUMA Masahiro

18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2013)　p. 118-122　2013/10　Research paper (international conference proceedings)

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 48　No. 6　p. 1530-1538　2013/06　Research paper (scientific journal)

Highlight Generation Technique for Baseball Games Based on Information Entropies

SADAMOTO Taishi, KATAOKA Mitsuteru, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

Proceedings of 2013 RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing (NCSP 2013)　p. 373-376　2013/03　Research paper (international conference proceedings)

Signal-Dependent Analog-to-Digital Conversion Based on MINIMAX Sampling

Igors Homjakovs, Masanori Hashimoto, Tetsuya Hirose, Takao Onoye

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E96A　No. 2　p. 459-468　2013/02　Research paper (scientific journal)

学習型超解像のための二分木辞書

HASHIMOTO Akinobu, NAKAYA Tomohiro, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

電子情報通信学会論文誌　Vol. J96-D　No. 2　p. 357-361　2013/02　Research paper (scientific journal)

A 0.8-V 110-nA CMOS current reference circuit using subthreshold operation

Igors Homjakovs, Tetsuya Hirose, Yuji Osaki, Masanori Hashimoto, Takao Onoye

IEICE ELECTRONICS EXPRESS　Vol. 10　No. 4　p. 20130022, 1-6　2013　Research paper (scientific journal)

A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application

Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

European Solid-State Circuits Conference　p. 315-318　2013　Research paper (international conference proceedings)

A dynamic comparator using dynamic currents of CMOS logic gates for low-power and high-efficient offset calibration

MASUDA Chotaro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

Extended abstract of the 2012 International Conference on Solid State Devices and Materials　p. 154-155　2012/09　Research paper (international conference proceedings)

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 47　No. 7　p. 1776-1783　2012/07　Research paper (scientific journal)

Microwatt Power CMOS Analog Circuit Designs: Ultralow Power LSIS for Power-Aware Applications

Ken Ueno, Tetsuya Hirose

Advanced Circuits for Emerging Technologies　p. 277-312　2012/05/07　Part of collection (book)

Saving power consumption in final stage adder of multiplier by using difference in arrival times with input signals

SHIZUKU Yuzuru, KOGURE Takeshi, FUJIOKA Tatsuya, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 192-196　2012/03　Research paper (international conference proceedings)

Reduction of glitches for low-power multipliers using 4-2 compressors based on hybrid-CMOS logic style

SON Yang-uk, SHIZUKU Yuzuru, KOGURE Takeshi, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 534-538　2012/03　Research paper (international conference proceedings)

Reconfigurable cells for post-mask ECO

SENZAKI Hiroto, MATSUYAMA Tomoki, WATANABE Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 199-204　2012/03　Research paper (international conference proceedings)

Hardware architecture for real-time operation of learning-based super-resolution using binary search tree

KITAYAMA Takahiro, MICHIBATA Kohei, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 492-496　2012/03　Research paper (international conference proceedings)

A technique for accelerating SVM-based image recognition using GPU

SASAKI Jin, SHIZUKU Yuzuru, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 28-32　2012/03　Research paper (international conference proceedings)

An error diagnosis technique based on SAT solver

MATSUYAMA Tomoki, SENZAKI Hiroto, WATANABE Kosuke, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 544-548　2012/03　Research paper (international conference proceedings)

A delay control technique for low-voltage subthreshold CMOS digital circuits

SHIGA Seiichiro, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

The 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)　Vol. pp. 555-559　2012/03　Research paper (international conference proceedings)

カラー画像に対応した画質評価手法VSNRC

KAWASHIMA Kazumi, NAKAYA Tomohiro, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

神戸大学大学院工学研究科紀要　Vol. 第3号, pp. 32-39　2012/02　Research paper (scientific journal)

Signal-Dependent Analog-to-Digital Converter Based on MINIMAX Sampling

Igors Homjakovs, Masanori Hashimoto, Takao Onoye, Tetsuya Hirose

2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC)　p. 120-123　2012　Research paper (international conference proceedings)

A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs

Yumiko Tsuruya, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa, Osamu Kobayashi

European Solid-State Circuits Conference　p. 69-72　2012　Research paper (international conference proceedings)

A Low-Power Single-Slope Analog-to-Digital Converter with Digital PVT Calibration

Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　p. 613-616　2012　Research paper (international conference proceedings)

A 6.66-kHz, 940-nW, 56ppm/degrees C, Fully On-chip PVT Variation Tolerant CMOS Relaxation Oscillator

Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa

2012 19TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS)　p. 97-100　2012　Research paper (international conference proceedings)

Current compensation circuit for precise nano-ampere current reference

ISONO Kosuke, HIROSE Tetsuya, OSAKI Yuji, KUROKI Nobutaka, NUMA Masahiro

2011 International Conference on Solid State Devices and Materials (SSDM 2011)　Vol. pp. 176-177　2011/09　Research paper (international conference proceedings)

Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit

Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

IEICE TRANSACTIONS ON ELECTRONICS　Vol. E94C　No. 6　p. 1042-1048　2011/06　Research paper (scientific journal)

Subthreshold SRAM with write assist technique using on-chip threshold voltage monitoring circuit

Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

IEICE Transactions on Electronics　Vol. E94-C　No. 6　p. 1042-1048　2011/06　Research paper (scientific journal)

A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEICE ELECTRONICS EXPRESS　Vol. 8　No. 12　p. 890-896　2011/06　Research paper (scientific journal)

クロス形状フラクタルを用いた画像の高解像度化

KAWASHIMA Kazumi, CHIKAMATSU Shingo, NAKAYA Tomohiro, KUROKI Nobutaka, HIROSE Tetsuya, NUMA Masahiro

電子情報通信学会論文誌　Vol. vol. J94-D, no. 4, pp. 742-745　No. 4　p. 742-745　2011/04　Research paper (scientific journal)

Temperature-Compensated Nano-Ampere Current Reference Circuit with Subthreshold Metal-Oxide-Semiconductor Field-Effect Transistor Resistor Ladder

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 50　No. 4　2011/04　Research paper (scientific journal)

カラー画像に対応した画質評価手法VSNRC—VSNR calculation for color images

河嶋, 和美, 中矢, 知宏, 廣瀬, 哲也, 黒木, 修隆, 沼, 昌宏

神戸大学大学院工学研究科・システム情報学研究科紀要　Vol. 3　p. 32-39　2011　Research paper (bulletin of university, research institution)

Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique

Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa

IEICE TRANSACTIONS ON ELECTRONICS　Vol. E94C　No. 1　p. 80-88　2011/01　Research paper (scientific journal)

A 95-nA, 523ppm/degrees C, 0.6-mu W CMOS Current Reference Circuit with Subthreshold MOS Resistor Ladder

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

2011 16TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)　p. 113-114　2011　Research paper (international conference proceedings)

Robust subthreshold cmos digital circuit design with on-chip adaptive supply voltage scaling technique

Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa

IEICE Transactions on Electronics　Vol. E94-C　No. 1　p. 80-88　2011/01　Research paper (international conference proceedings)

A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011　Vol. pp. 201-204　p. 201-204　2011　Research paper (international conference proceedings)

High Current Efficiency Sense Amplifier Using Body-Bias Control for Ultra-Low-Voltage SRAM

Chotaro Masuda, Tetsuya Hirose, Kei Matsumoto, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)　Vol. Wp2Track2_1-1　2011　Research paper (international conference proceedings)

A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

European Solid-State Circuits Conference　Vol. pp. 199-202　p. 199-202　2011　Research paper (international conference proceedings)

A 105-nW CMOS Thermal Sensor for Power-aware Applications

Toshi Nagayama, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

2011 IEEE SENSORS　Vol. pp. 1265-1268　p. 1265-1268　2011　Research paper (international conference proceedings)

Ultra-low power and low voltage circuit design for next-generation power-aware LSI applications

Tetsuya Hirose

2011 International SoC Design Conference, ISOCC 2011　Vol. pp. 24-27　p. 24-27　2011　Research paper (international conference proceedings)

A 18.9-nA standby current comparator with adaptive bias current generator

Kosuke Isono, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa

2011 Proceedings of Technical Papers: IEEE Asian Solid-State Circuits Conference 2011, A-SSCC 2011　Vol. pp. 237-240　p. 237-240　2011　Research paper (international conference proceedings)

Signal-Dependent Analog-to-Digital Conversion based on MINIMAX Sampling

Igors Homjakovs, Masanori Hashimoto, Takao Onoye, Tetsuya Hirose

2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)　Vol. E69-A　No. 2　p. 459-468　2011　Research paper (international conference proceedings)

An Error Diagnosis Technique Based on Clustering of Elements

Kosuke Shioki, Narumi Okada, Kosuke Watanabe, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E93A　No. 12　p. 2490-2496　2010/12　Research paper (scientific journal)

Characteristics of short-term slow slip events estimated from deep low-frequency tremors in Shikoku, Japan

Tetsuya Hirose, Yoshihiro Hiramatsu, Kazushige Obara

JOURNAL OF GEOPHYSICAL RESEARCH-SOLID EARTH　Vol. 115　2010/10　Research paper (scientific journal)

A 1-mu W 600-ppm/degrees C Current Reference Circuit Consisting of Subthreshold CMOS Circuits

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS　Vol. 57　No. 9　p. 681-685　2010/09　Research paper (scientific journal)

An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs

Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE TRANSACTIONS ON ELECTRONICS　Vol. E93C　No. 6　p. 835-841　2010/06　Research paper (scientific journal)

An on-chip PVT compensation technique with current monitoring circuit for low-voltage CMOS digital LSIs

Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE Transactions on Electronics　Vol. E93-C　No. 6　p. 835-841　2010/06　Research paper (scientific journal)

Level Converter Circuit for Low Voltage Digital LSIs

OSAKI Yuji, HIROSE Tetsuya, KUROKI Nobutaka, NUMA Masahiro

ITE Technical Report　Vol. 34　p. 133-138　2010　Research paper (other academic)

Super-Resolution Technique for Thermography with Dual-Camera System

Shingo Chikamatsu, Tomohiro Nakaya, Masakazu Kouda, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa

2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS　p. 1895-1898　2010　Research paper (international conference proceedings)

Write-Assisted Subthreshold SRAM by Using On-Chip Threshold Voltage Monitoring Circuit

Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS　p. 133-136　2010　Research paper (international conference proceedings)

Nano-Ampere CMOS Current Reference with Little Temperature Dependence Using Small Offset Voltage

Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS　p. 668-671　2010　Research paper (international conference proceedings)

A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs

Tetsuya Hirose, Ken Ueno, Nobutaka Kuroki, Masahiro Numa

2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010　p. 77-80　2010　Research paper (international conference proceedings)

A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

ESSCIRC 2010 - 36th European Solid State Circuits Conference　p. 114-117　2010　Research paper (international conference proceedings)

Floating millivolt reference for PTAT current generation in subthreshold MOS LSIs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers　Vol. 63　No. 12　p. 1877-1880　2009/12　Research paper (scientific journal)

Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E92A　No. 12　p. 3079-3081　2009/12　Research paper (scientific journal)

An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits

Kosuke Shioki, Narumi Okada, Toshiro Ishihara, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E92A　No. 12　p. 3136-3142　2009/12　Research paper (scientific journal)

A 300 nW, 15 ppm/degrees C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 44　No. 7　p. 2047-2054　2009/07　Research paper (scientific journal)

A Look-ahead Active Body-biasing scheme for SOI-SRAM with dynamic V-DDM control

Kayoko Seto, Masaaki Iijima, Tetsuya Hirose, Masahiro Numa, Akira Tada, Takashi Ipposhi

IEICE ELECTRONICS EXPRESS　Vol. 6　No. 8　p. 456-460　2009/04　Research paper (scientific journal)

A Highly Sensitive Thermosensing CMOS Circuit Based on Self-Biasing Circuit Technique

Tetsuya Hirose, Atsushi Hagiwara, Tetsuya Asai, Yoshihito Amemiya

IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING　Vol. 4　No. 2　p. 278-286　2009/03　Research paper (scientific journal)

Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits

Taichi Ogawa, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E92A　No. 2　p. 436-442　2009/02　Research paper (scientific journal)

Threshold-logic devices consisting of subthreshold CMOS circuits

Taichi Ogawa, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E92-A　No. 2　p. 436-442　2009/02　Research paper (scientific journal)

Delay Variation Tolerant Subthreshold Digital Circuits for Ultra-Low Power

OSAKI Yuji, HIROSE Tetsuya, MATSUMOTO Kei, KUROKI Nobutaka, NUMA Masahiro

ITE Technical Report　Vol. 33　p. 165-170　2009　Research paper (conference, symposium, etc.)

A 300 nW, 7 ppm/degrees C CMOS Voltage Reference Circuit based on Subthreshold MOSFETs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009　p. 95-+　2009　Research paper (international conference proceedings)

On-Chip PVT Compensation Techniques for Low-Voltage CMOS Digital LSIs

Yusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose

ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5　p. 1565-+　2009　Research paper (international conference proceedings)

Switching-Voltage Detection and Compensation Circuits for Ultra-Low-Voltage CMOS Inverters

Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa

2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2　p. 483-486　2009　Research paper (international conference proceedings)

Delay-Compensation Techniques for Ultra-Low-Power Subthreshold CMOS Digital LSIs

Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa

2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2　p. 503-506　2009　Research paper (international conference proceedings)

Process compensation techniques for low-voltage CMOS digital circuits

Yusuke Tsugita, Tetsuya Hirose, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya

Kyokai Joho Imeji Zasshi/Journal of the Institute of Image Information and Television Engineers　Vol. 63　No. 11　p. 1667-1670　2009　Research paper (scientific journal)

Noise-induced synchronization among sub-RF CMOS analog oscillators for skew-free clock distribution

Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E91A　No. 9　p. 2475-2481　2008/09　Research paper (scientific journal)

Non-linear phenomena in electronic systems consisting of coupled single-electron oscillators

Andrew Kilinga Kikombo, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

CHAOS SOLITONS & FRACTALS　Vol. 37　No. 1　p. 100-107　2008/07　Research paper (scientific journal)

Temperature-compensated CMOS current reference circuit for ultralow-power subthreshold LSIs

Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE ELECTRONICS EXPRESS　Vol. 5　No. 6　p. 204-210　2008/03　Research paper (scientific journal)

An Ultra-low Power Voltage Reference Circuit consisting of Subthreshold MOSFETs

UENO Ken, HIROSE Tetsuya, ASAI Tetsuya, AMEMIYA Yoshihito

ITE Technical Report　Vol. 32　p. 55-60　2008　Research paper (other academic)

Process compensation techniques for low-voltage CMOS digital circuits

TSUGITA Yusuke, UENO Ken, HIROSE Tetsuya, ASAI Tetsuya, AMEMIYA Yoshihito

ITE Technical Report　Vol. 32　p. 49-54　2008　Research paper (other academic)

Analog CMOS circuits implementing neural segmentation model based on symmetric STDP learning

Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

NEURAL INFORMATION PROCESSING, PART II　Vol. 4985　No. PART 2　p. 117-+　2008　Research paper (international conference proceedings)

A 46-ppm/degrees C Temperature and Process Compensated Current Reference with On-Chip Threshold Voltage Monitoring Circuit

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

2008 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE　p. 161-+　2008　Research paper (international conference proceedings)

A 0.3-mu W, 7 ppm/degrees C CMOS Voltage Reference Circuit for On-Chip Process Monitoring in Analog Circuits

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

ESSCIRC 2008: PROCEEDINGS OF THE 34TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE　p. 398-+　2008　Research paper (international conference proceedings)

On digital LSI circuits exploiting collision-based fusion gates

Kazuhito Yamada, Tetsuya Asai, Tetsuya Hirose, Yoshito Amemiya

INTERNATIONAL JOURNAL OF UNCONVENTIONAL COMPUTING　Vol. 4　No. 1　p. 45-59　2008　Research paper (scientific journal)

Critical temperature sensor based on oscillatory neuron models

G. M. Tovar, T. Asai, HIROSE Tetsuya, Y. Amemiya

Journal of Signal Processing　Vol. vol. 12, no. 1, pp. 17-24　No. 1　p. 17-24　2008/01　Research paper (scientific journal)

A subthreshold CMOS circuit for a piecewise linear neuromorphic oscillator with current-mode low-pass filters

Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Hatsuo Hayashi, Yoshihito Amemiya

NEUROCOMPUTING　Vol. 71　No. 1-3　p. 3-12　2007/12　Research paper (scientific journal)

Pulsed neural networks consisting of single-flux-quantum spiking neurons

T. Hirose, T. Asai, Y. Amemiya

Physica C: Superconductivity and its Applications　Vol. 463-465　No. SUPPL.　p. 1072-1075　2007/10/01　Research paper (scientific journal)

An inhibitory neural-network circuit exhibiting noise shaping with subthreshold MOS neuron circuits

Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E90A　No. 10　p. 2108-2115　2007/10　Research paper (scientific journal)

Noise-shaping pulse-density modulation in inhibitory neural networks with subthreshold neuron circuits

Akira Utagawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

International Congress Series　Vol. 1301　p. 71-74　2007/07　Research paper (scientific journal)

A CMOS reaction-diffusion device using minority-carrier diffusion in semiconductors

Motoyoshi Takahashi, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

INTERNATIONAL JOURNAL OF BIFURCATION AND CHAOS　Vol. 17　No. 5　p. 1713-1719　2007/05　Research paper (scientific journal)

CMOS smart sensor for monitoring the quality of perishables

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 42　No. 4　p. 798-803　2007/04　Research paper (scientific journal)

Floating millivolt reference for PTAT current generation in subthreshold MOS LSIs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11　p. 3748-3751　2007　Research paper (international conference proceedings)

Neuromorphic CMOS circuits implementing a novel neural segmentation model based on symmetric STDP learning

Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

2007 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-6　p. 897-+　2007　Research paper (international conference proceedings)

Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

Proceedings - IEEE International Symposium on Circuits and Systems　p. 3748-3751　2007　Research paper (international conference proceedings)

Neuromorphic CMOS circuits implementing a novel neural segmentation model based on symmetric STDP learning

Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEEE International Conference on Neural Networks - Conference Proceedings　Vol. vol. 11, no. 6, pp. 439-444　p. 897-901　2007　Research paper (international conference proceedings)

Power-supply circuits for ultralow-power subthreshold MOS-LSIs

Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE ELECTRONICS EXPRESS　Vol. 3　No. 22　p. 464-468　2006/11　Research paper (scientific journal)

Neuromorphic MOS circuits exhibiting precisely timed synchronization with silicon spiking neurons and depressing synapses

G. M. Tovar, HIROSE Tetsuya, T. Asai, Y. Amemiya

Journal of Signal Processing　Vol. vol. 10, no. 6, pp. 391-397　No. 6　p. 391-397　2006/11　Research paper (scientific journal)

Spiking neuron devices consisting of single-flux-quantum circuits

Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

PHYSICA C-SUPERCONDUCTIVITY AND ITS APPLICATIONS　Vol. 445　No. 1-2　p. 1020-1023　2006/10　Research paper (scientific journal)

弱反転MOSFETを用いた温度検出スイッチ回路

萩原 淳史, HIROSE Tetsuya, 浅井 哲也, 雨宮 好仁

電子情報通信学会論文誌,　Vol. vol. J89-C, no. 10, pp. 654-65　No. 10　p. 654-656　2006/10　Research paper (scientific journal)

Single-flux-quantum circuits for spiking neuron devices

Tetsuya Hirose, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya

International Congress Series　Vol. 1291　p. 221-224　2006/06　Research paper (scientific journal)

A CMOS watchdog sensor for certifying the quality of various perishables with a wider activation energy

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E89-A　No. 4　p. 902-907　2006/04　Research paper (international conference proceedings)

Neuronal synchrony detection on single-electron neural networks

Takahide Oya, Tetsuya Asai, Ryo Kagaya, Tetsuya Hirose, Yoshihito Amemiya

Chaos, Solitons and Fractals　Vol. 27　No. 4　p. 887-894　2006/02　Research paper (scientific journal)

Critical temperature switch: A highly sensitive thermosensing device consisting of subthreshold MOSFET circuits

Atsushi Hagiwara, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

2006 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATIONS, VOLS 1 AND 2　p. 99-102　2006　Research paper (international conference proceedings)

Ultralow-power smart temperature sensor with subthreshold CMOS circuits

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

2006 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATIONS, VOLS 1 AND 2　p. 505-+　2006　Research paper (international conference proceedings)

Power supply circuits for ultralow-power subthreshold CMOS smart sensor LSIs

Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

2006 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATIONS, VOLS 1 AND 2　p. 513-+　2006　Research paper (international conference proceedings)

A watchdog sensor for assuring the quality of various perishables with subthreshold CMOS circuits

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

IEEE Symposium on VLSI Circuits, Digest of Technical Papers　p. 156-157　2006　Research paper (international conference proceedings)

A subthreshold analog MOS circuit for Lotka-Volterra chaotic oscillator

Tetsuya Asai, Taishi Kamiya, Tetsuya Hirose, Yoshihito Amemiya

International Journal of Bifurcation and Chaos　Vol. 16　No. 1　p. 207-212　2006/01　Research paper (scientific journal)

Ultralow-power current reference circuit with low temperature dependence

Tetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya

IEICE Transactions on Electronics　Vol. E88-C　No. 6　p. 1142-1147　2005/06　Research paper (scientific journal)

A quadrilateral-object composer for binary images with reaction-diffusion cellular automata

Tetsuya Asai, Masayuki Ikebe, Tetsuya Hirose, Yoshihito Amemiya

International Journal of Parallel, Emergent and Distributed Systems　Vol. 20　No. 1　p. 57-67　2005/03　Research paper (international conference proceedings)

Analog reaction-diffusion chip imitating Belousov-Zhabotinsky reaction with hardware Oregonator model

T. Asai, Y. Kanazawa, HIROSE Tetsuya, Y. Amemiya

International Journal of Unconventional Computing　Vol. vol. 1, no. 2, pp. 123-147　No. 2　p. 123-147　2005/03　Research paper (scientific journal)

Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filters

K Nakada, T Asai, T Hirose, Y Amemiya

2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS　p. 1923-1926　2005　Research paper (international conference proceedings)

Ultralow-power temperature-insensitive current reference circuit

Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya, Toshimasa Matsuoka, Kenji Taniguchi

Proceedings of IEEE Sensors　Vol. 2005　p. 1205-1208　2005　Research paper (international conference proceedings)

Analog current-mode CMOS implementation of central pattern generator for robot locomotion

Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

Proceedings of the International Joint Conference on Neural Networks　Vol. 1　p. 639-644　2005　Research paper (international conference proceedings)

A CMOS watch-dog sensor for guaranteeing the quality of perishables

Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya

Proceedings of IEEE Sensors　Vol. 2005　p. 1209-1212　2005　Research paper (international conference proceedings)

Analog cmos implementation of a neuromorphic oscillator with current-mode low-pass filters

Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

Proceedings - IEEE International Symposium on Circuits and Systems　p. 1923-1926　2005　Research paper (international conference proceedings)

A CMOS IF variable gain amplifier with exponential gain control

Sungwoo Cha, Tetsuya Hirose, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E88-A　No. 2　p. 410-414　2005　Research paper (scientific journal)

Watch-dog circuit for quality guarantee with subthreshold MOSFET current

Tetsuya Hirose, Ryuji Yoshimura, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi

IEICE Transactions on Electronics　Vol. E87-C　No. 11　p. 1910-1914　2004/11　Research paper (scientific journal)

Watchdog Circuit for Product Degradation Monitor using Subthreshold MOS Current

Tetsuya Hirose, Ryuji Yoshimura, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi

Ext. Abst. International Conference on Solid State Devices and Materials, Sep. 14-17, 2004, Tokyo, Japan, pp. 150-151.　2004/09　Research paper (international conference proceedings)

Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata

Hiroshi Matsubara, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEICE Electronics Express　Vol. 1　No. 9　p. 248-252　2004/08　Research paper (scientific journal)

Calculation of boron segregation at the Si(100)/SiO<inf>2</inf> interface

M. Furuhashi, T. Hirose, H. Tsuji, M. Tachi, K. Taniguchi

EPJ Applied Physics　Vol. 27　No. 1-3　p. 163-166　2004/07　Research paper (international conference proceedings)

A MOS circuit for depressing synapse and its application to contrast-invariant pattern classification and synchrony detection

Tetsuya Asai, Yusuke Kanazawa, Tetsuya Hirose, Yoshihito Amemiya

IEEE International Conference on Neural Networks - Conference Proceedings　Vol. 4　p. 2619-2624　2004　Research paper (international conference proceedings)

A quadrilateral-object composer for binary images with reaction-diffusion cellular automata

Masayuki Ikebe, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits　p. 406-409　2004　Research paper (international conference proceedings)

Digital VLSI implementation of ultra-discrete cellular automata for simulating traffic flow

Kazuki Nakada, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEEE International Symposium on Communications and Information Technologies: ISCIT 2004　Vol. 1　p. 394-397　2004　Research paper (international conference proceedings)

ポリSi TFTの過渡特性における自己発熱及びキンク効果の影響の分離評価

多田 憲史, HIROSE Tetsuya, 松岡 俊匡, 谷口 研二, 前田 和宏, 酒井 保, 久保田 靖, 今井 繁規

電子情報通信学会論文誌　Vol. vol. J87-C, no. 1, pp. 186-187　No. 1　p. 186-187　2004/01　Research paper (scientific journal)

A MOS circuit for bursting neural oscillators with excitable oregonators

Yusuke Kanazawa, Tetsuya Asai, Tetsuya Hirose, Yoshihito Amemiya

IEICE Electronics Express　Vol. 1　No. 4　p. 73-76　2004　Research paper (scientific journal)

Atomic configuration of boron pile-up at the Si/SiO<inf>2</inf> interface

Masayuki Furuhashi, Tetsuya Hirose, Hiroshi Tsuji, Masayuki Tachi, Kenji Taniguchi

IEICE Electronics Express　Vol. 1　No. 6　p. 126-130　2004　Research paper (scientific journal)

高精度品質保証期限モニタ回路

吉村 隆治, HIROSE Tetsuya, 井戸 徹, 松岡 俊匡, 谷口 研二

電子情報通信学会論文誌　Vol. vol. J86-C, no. 9, pp. 1041-10　No. 9　p. 1041-1043　2003/09　Research paper (scientific journal)

Photoluminescence study of {311}defect-precursors in self-implanted silicon

H. Tsuji, R. Kim, T. Hirose, T. Shano, Y. Kamakura, K. Taniguchi

Materials Science and Engineering B: Solid-State Materials for Advanced Technology　Vol. 91-92　p. 43-45　2002/04　Research paper (international conference proceedings)

Atomic configuration study of implanted F in Si based on experimental evidences and ab initio calculations

T. Hirose, T. Shano, R. Kim, H. Tsuji, Y. Kamakura, K. Taniguchi

Materials Science and Engineering B: Solid-State Materials for Advanced Technology　Vol. 91-92　p. 148-151　2002/04　Research paper (international conference proceedings)

Photoluminescence and ab initio study of {311} defect nucleation in Si

H. Tsuji, R. Kim, T. Hirose, M. Furuhashi, M. Tachi, K. Taniguchi

Extended Abstracts of the 3rd International Workshop on Junction Technology, IWJT 2002　p. 49-50　2002　Research paper (international conference proceedings)

Influences of point and extended defects on as diffusion in Si

Ryangsu Kim, Tetsuya Hirose, Toshihumi Shano, Hiroshi Tsuji, Kenji Taniguchi

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers　Vol. 41　No. 1　p. 227-231　2002　Research paper (scientific journal)

Anomalous phosphorus diffusion in Si during postimplantation annealing

Ryangsu Kim, Yoshikazu Furuta, Syunsuke Hayashi, Tetsuya Hirose, Toshihumi Shano, Hiroshi Tsuji, Kenji Taniguchi

Applied Physics Letters　Vol. 78　No. 24　p. 3818-3820　2001/06/11　Research paper (scientific journal)

Realization of ultra-shallow junction: Suppressed boron diffusion and activation by optimized fluorine co-implantation

Toshifumi Shano, Ryangsu Kim, Tetsuya Hirose, Yoshikazu Furuta, Hiroshi Tsuji, Masayuki Furuhashi, Kenji Taniguchi

Technical Digest-International Electron Devices Meeting　p. 821-824　2001　Research paper (scientific journal)

Modeling of arsenic transient enhanced diffusion and background boron segregation in low-energy As⁺ implanted Si

R. Kim, T. Aoki, T. Hirose, Y. Furuta, S. Hayashi, T. Shano, K. Taniguchi

Technical Digest - International Electron Devices Meeting　p. 523-525　2000　Research paper (international conference proceedings)

Degradation of ultra-thin gate oxides accompanied by hole direct tunneling: Can we keep long-term reliability of p-MOSFETs?

K. Deguchi, S. Uno, A. Ishida, T. Hirose, Y. Kamakura, K. Taniguchi

Technical Digest - International Electron Devices Meeting　p. 327-330　2000　Research paper (international conference proceedings)