Cryo-HT: Hardware Trojan Activated at Cryogenic Temperatures

Ayano Takaya, Ryuichi Nakajima, Jun Shiomi, Michihiro Shintani

Proceedings of the 30th Asia and South Pacific Design Automation Conference　p. 1264-1269　2025/01/23　Research paper (international conference proceedings)

Hardware Trojan Detection by Fine-grained Power Domain Partitioning

Takahiro Ishikawa, Kose Yokooji, Yoshihiro Midoh, Noriyuki Miura, Michihiro Shintani, Jun Shiomi

Proceedings of the 30th Asia and South Pacific Design Automation Conference　p. 1257-1263　2025/01/23　Research paper (international conference proceedings)

歌唱発声による誤嚥防止訓練に伴う水飲みテスト時の喉頭運動の変化

大西智也, 御堂義博, 塩見 準, 弓場 徹, 三浦典之

信学技報　Vol. HCS2024-86/HIP2024-87　p. 115-119　2025/01　Research paper (conference, symposium, etc.)

RGB-Dカメラを用いた喉頭運動計測の性能評価

大西智也, 御堂義博, 細川清人, 橋田 直, 塩見 準, 弓場 徹, 猪原秀典, 三浦典之

信学技報　Vol. HIP2024-57　p. 30-34　2024/12　Research paper (conference, symposium, etc.)

光ニューラルネットワークに対する熱故障注入攻撃の実行時検知

西田 孔太, 御堂 義博, 三浦 典之, 川上 哲志, 塩見 準

デザインガイア2024　p. 1-6　2024/11/14　Research paper (conference, symposium, etc.)

Square-wave defined pulse generator for high fidelity gate operation of superconducting qubits

Ryosuke Matsuo, Kazuhisa Ogawa, Hidehisa Shiomi, Makoto Negoro, Ryutaro Ohira, Takefumi Miyosh, Michihiro Shintani, Hiromitsu Awano, Takashi Sato, Jun Shiomi

2024 IEEE International Conference on Quantum Computing and Engineering (QCE)　p. 378-379　2024/09/16　Research paper (international conference proceedings)

Double-Sided Multimodal Attack Sensing and Partial Re-Keying in Shared Group Key System

Ryuki Ikemoto, Soichiro Fujii, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Yuki Yamashita, Misato Taguchi, Takuji Miki, Makoto Nagata, Yuichi Komano, Mitsugu Iwamoto, Kazuo Sakiyama, Noriyuki Miura

European Solid-State Electronics Research Conference　2024/09/12　Research paper (international conference proceedings)

低温・低電圧動作によるCMOSインバータの3値論理特性

冨永 孝太郎, 松尾 亮祐, 御堂 義博, 三浦 典之, 新谷 道広, 塩見 準

DAシンポジウム2024論文集　Vol. 100　No. 105　2024/08/28　Research paper (conference, symposium, etc.)

細粒度電源ドメイン分割によるハードウェアトロイ検出の高精度化

石川 貴大, 横大路 弘成, 御堂 義博, 三浦 典之, 新谷 道広, 塩見 準

DAシンポジウム2024論文集　p. 8-13　2024/08/28　Research paper (conference, symposium, etc.)

StrideHD: A Binary Hyperdimensional Computing System Utilizing Window Striding for Image Classification

Dehua Liang, Jun Shiomi, Noriyuki Miura, Hiromitsu Awano

IEEE Open Journal of Circuits and Systems　Vol. 5　p. 211-223　2024/06　Research paper (scientific journal)

インフラ監視カメラ用計測セキュリティ技術の実機評価

西邨なぎさ, 成瀬厚太郎, 塩見準, 御堂義博, 三浦典之

信学技報　Vol. 123　No. 391　p. 196-197　2024/03/02　Research paper (conference, symposium, etc.)

Voltage Dependence Model of Electromagnetic Side-Channel Attacks on Cryptographic Circuits

Kazuki Minamiguchi, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi

The 25th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2024)　p. 361-366　2024/03　Research paper (international conference proceedings)

［記念講演］Modeling of Tamper Resistance to Electromagnetic Side-channel Attacks on Voltage-scaled Circuits

Kazuki Minamiguchi, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi

信学技報　Vol. 123　No. 390　p. 99-99　2024/02/29　Research paper (conference, symposium, etc.)

Open Set Domain Adaptation for Image Classification With Multiple Unknown Labels Using Unsupervised Clustering in a Target Domain

Daichi Nishihara, Yoshihiro Midoh, Youyang Ng, Osamu Yamane, Maasa Takahashi, Shuhei Iijima, Jun Shiomi, Goh Itoh, Noriyuki Miura

Electronic Imaging　Vol. 36　No. 15　p. 162-1　2024/01/21　Research paper (international conference proceedings)

Edge-oriented Point Cloud Compression by Moving Object Detection for Realtime Smart Monitoring

Itsuki Takada, Daiki Nitto, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi, Ryoichi Shinkuma

IEEE Consumer Communications & Networking Conference (CCNC)　p. 717-722　2024/01　Research paper (conference, symposium, etc.)

Modeling of Tamper Resistance to Electromagnetic Side-channel Attacks on Voltage-scaled Circuits

Kazuki Minamiguchi, Yoshihiro Midoh, Noriyuki Miura, Jun Shiomi

ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC)　p. 618-624　2024/01　Research paper (international conference proceedings)

Nonvolatile Storage Cells Using FiCC for IoT Processors with Intermittent Operations

Yuki ABE, Kazutoshi KOBAYASHI, Jun SHIOMI, Hiroyuki OCHI

IEICE Transactions on Electronics　Vol. E106.C　No. 10　p. 546-555　2023/10/01　Research paper (scientific journal)

A Robust and Energy Efficient Hyperdimensional Computing System for Voltage-scaled Circuits

Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi

ACM Transactions on Embedded Computing Systems　2023/09/11　Research paper (scientific journal)

A Fetal-Movement Circuit Harvesting High-Energy Plasma During Fabrication, Concept, and Its Application to Self-Programming PUF

Kotaro Naruse, Takayuki Ueda, Jun Shiomi, Yoshihiro Midoh, Noriyuki Miura

IEEE Solid-State Circuits Letters　Vol. 6　p. 269-272　2023/09　Research paper (scientific journal)

暗号回路に対する電磁波解析攻撃に必要な波形取得回数の電源電圧依存性モデル

南口 和生, 御堂 義博, 三浦 典之, 塩見 準

DAシンポジウム2023　p. 35-40　2023/08　Research paper (conference, symposium, etc.)

Real-Time Adaptive Data Transmission Against Various Traffic Load in Multi-LIDAR Sensor Network for Indoor Monitoring

Kuon Akiyama, Kenta Azuma, Ryoichi Shinkuma, Jun Shiomi

IEEE Sensors Journal　Vol. 23　No. 15　p. 17676-17689　2023/08/01　Research paper (scientific journal)

近距離向けRGB-Dカメラを用いた嚥下時の喉頭運動計測

前 綾香, 御堂義博, 塩見 準, 弓場 徹, 三浦典之

信学技報　Vol. 123　No. 25　p. 163-165　2023/05　Research paper (conference, symposium, etc.)

［依頼講演］間欠動作を行うIoT向けプロセッサに適したFiCCを用いた不揮発ストレージセル

阿部佑貴, 小林和淑, 塩見 準, 越智裕之

信学技報　Vol. 123　No. 1　p. 1-6　2023/04/10　Research paper (conference, symposium, etc.)

胎動回路のPUF応用

成瀬厚太郎, 上田貴之, 塩見準, 御堂義博, 三浦典之

信学技報　Vol. 123　No. 6　p. 49-50　2023/04　Research paper (conference, symposium, etc.)

固有PRNUを利用したインフラ監視カメラの計測セキュリティ

成瀬厚太郎, 佐々木輝, 川村康輔, 塩見準, 御堂義博, 三浦典之

信学技報　Vol. 123　No. 6　p. 32-33　2023/04　Research paper (conference, symposium, etc.)

物理攻撃センサを利用した部分鍵更新付きAES暗号プロセッサ

池本龍生, 藤井聡一朗, 山下憂記, 永田真, 塩見準, 御堂義博, 三浦典之

信学技報　Vol. 123　No. 6　p. 34-36　2023/04　Research paper (conference, symposium, etc.)

暗号回路から漏えいする電磁波の電源電圧依存性モデル

南口和生, 御堂義博, 三浦典之, 塩見準

信学技報,　Vol. 123　No. 6　p. 9-10　2023/04　Research paper (conference, symposium, etc.)

センサ固有特性のPUF利用による計測データと計測デバイスの同時認証

川村康輔, 久保田康裕, 永田真, 塩見準, 御堂義博, 三浦典之

信学技報　Vol. 123　No. 6　p. 51-53　2023/04　Research paper (conference, symposium, etc.)

［記念講演］DependableHD: A Hyperdimensional Learning Framework for Edge-oriented Voltage-scaled Circuits

Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi

信学技報　Vol. 122　No. 402　p. 111-111　2023/03　Research paper (conference, symposium, etc.)

Approximation-Based System Implementation for Real-Time Minimum Energy Point Tracking over a Wide Operating Performance Region

Shoya SONODA, Jun SHIOMI, Hidetoshi ONODERA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E106.A　No. 3　p. 542-550　2023/03/01　Research paper (scientific journal)

13.3 A Triturated Sensing System

Noriyuki Miura, Kotaro Naruse, Jun Shiomi, Yoshihiro Midoh, Tetsuya Hirose, Takaaki Okidono, Takuji Miki, Makoto Nagata

2023 IEEE International Solid- State Circuits Conference (ISSCC)　2023/02/19　Research paper (international conference proceedings)

13.4 A Self-Programming PUF Harvesting the High-Energy Plasma During Fabrication

Kotaro Naruse, Takayuki Ueda, Jun Shiomi, Yoshihiro Midoh, Noriyuki Miura

2023 IEEE International Solid- State Circuits Conference (ISSCC)　2023/02/19　Research paper (international conference proceedings)

DependableHD: A Hyperdimensional Learning Framework for Edge-oriented Voltage-scaled Circuits

Dehua Liang, Hiromitsu Awano, Noriyuki Miura, Jun Shiomi

Asia and South Pacific Design Automation Conference (ASP-DAC)　p. 416-422　2023/01　Research paper (conference, symposium, etc.)

複雑系データから複数支配方程式の抽出が可能なデータ駆動型探索法

御堂義博, 武本侑己, 塩見 準, 三浦典之

第42回ナノテスティングシンポジウム(NANOTS2022)　p. 108-112　2022/11　Research paper (conference, symposium, etc.)

物理的な雑音特性の異なる画像の分類におけるドメイン適応

西原大地, 御堂義博, Youyang Ng, 山根 統, 伊藤 剛, 藤原 剛, 塩見 準, 三浦典之

第42回ナノテスティングシンポジウム(NANOTS2022)　p. 1-6　2022/11　Research paper (conference, symposium, etc.)

Zero-Aware Fine-Grained Power Gating for Standard-Cell Memories in Voltage-Scaled Circuits

Jun Shiomi, Shogo Terada, Tohru Ishihara, Hidetoshi Onodera

IEEE 35th International System-on-Chip Conference (SOCC)　p. 124-129　2022/09　Research paper (international conference proceedings)

集積回路より漏えいする電磁波の電源電圧依存性モデル

南口 和生, 御堂 義博, 三浦 典之, 塩見 準

DAシンポジウム2022　p. 58-63　2022/08　Research paper (conference, symposium, etc.)

固有PRNUに基づく撮像カメラデバイス同定技術のインフラ監視システムへの応用

佐々木輝, 川村康輔, 御堂 義博, 塩見準, 三浦典之

信号処理研究会　Vol. 122　No. 165　p. 65-69　2022/08　Research paper (conference, symposium, etc.)

静電容量型タッチセンサの計測中間値を利用した高信頼電子筆跡認証方式の検討

川村康輔, 久保田康裕, 永田真, 御堂 義博, 塩見準, 三浦典之

信号処理研究会　Vol. 122　No. 165　p. 125-128　2022/08　Research paper (conference, symposium, etc.)

A Hardware Efficient Reservoir Computing System Using Cellular Automata and Ensemble Bloom Filter

Dehua LIANG, Jun SHIOMI, Noriyuki MIURA, Masanori HASHIMOTO, Hiromitsu AWANO

IEICE Transactions on Information and Systems　Vol. E105.D　No. 7　p. 1273-1282　2022/07/01　Research paper (scientific journal)

Real-time adaptive data filtering with multiple sensors for indoor monitoring

Kuon Akiyama, Ryoichi Shinkuma, Jun Shiomi

NOMS 2022-2022 IEEE/IFIP Network Operations and Management Symposium　2022/04/25　Research paper (international conference proceedings)

Zero-standby-power Nonvolatile Standard Cell Memory Using FiCC for IoT

Yuki Abe, Kazutoshi Kobayashi, Jun Shiomi, Hiroyuki Ochi

IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 25)　p. 641-646　2022/04　Research paper (international conference proceedings)

［記念講演］DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification

Dehua Liang, Jun Shiomi, Noriyuki Miura, Hiromitsu Awano

信学技報　Vol. 121　No. 412　p. 44-44　2022/03/07　Research paper (conference, symposium, etc.)

Approximation-Based Implementation for a Minimum Energy Point Tracking Algorithm over a Wide Operating Performance Region

Shoya Sonoda, Jun Shiomi, Hidetoshi Onodera

13th Latin American Symposium on Circuits and Systems (LASCAS)　p. 216-219　2022/03/04　Research paper (international conference proceedings)

Approximate Minimum Energy Point Tracking and Task Scheduling for Energy-Efficient Real-Time Computing

Takumi KOMORI, Yutaka MASUDA, Jun SHIOMI, Tohru ISHIHARA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E105.A　No. 3　p. 518-529　2022/03/01　Research paper (scientific journal)

DistriHD: A Memory Efficient Distributed Binary Hyperdimensional Computing Architecture for Image Classification

Dehua Liang, Jun Shiomi, Noriyuki Miura, Hiromitsu Awano

Asia and South Pacific Design Automation Conference (ASP-DAC)　Vol. 2022-January　p. 43-49　2022/01　Research paper (international conference proceedings)

Tamper-Resistant Optical Logic Circuits Based on Integrated Nanophotonics

Jun Shiomi, Shuya Kotsugi, Boyu Dong, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

2021 58th ACM/IEEE Design Automation Conference (DAC)　p. 139-144　2021/12/05　Research paper (international conference proceedings)

Supply and Threshold Voltage Scaling for Minimum Energy Operation over a Wide Operating Performance Region

Shoya SONODA, Jun SHIOMI, Hidetoshi ONODERA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E104.A　No. 11　p. 1566-1576　2021/11/01　Research paper (scientific journal)

A Synthesis Method Based on Multi-Stage Optimization for Power-Efficient Integrated Optical Logic Circuits

Ryosuke MATSUO, Jun SHIOMI, Tohru ISHIHARA, Hidetoshi ONODERA, Akihiko SHINYA, Masaya NOTOMI

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E104.A　No. 11　p. 1546-1554　2021/11/01　Research paper (scientific journal)

Evaluation Metrics for the Cost of Data Movement in Deep Neural Network Acceleration

Hongjie XU, Jun SHIOMI, Hidetoshi ONODERA

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E104.A　No. 11　p. 1488-1498　2021/11/01　Research paper (scientific journal)

Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation

Naoki HATTORI, Jun SHIOMI, Yutaka MASUDA, Tohru ISHIHARA, Akihiko SHINYA, Masaya NOTOMI

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E104.A　No. 11　p. 1477-1487　2021/11/01　Research paper (scientific journal)

A DLL-Based Body Bias Generator with Independent P-Well and N-Well Biasing for Minimum Energy Operation

Kentaro NAGAI, Jun SHIOMI, Hidetoshi ONODERA

IEICE Transactions on Electronics　Vol. E104.C　No. 10　p. 617-624　2021/10/01　Research paper (scientific journal)

間欠動作を行うIoT向けプロセッサに適したFiCCを用いた不揮発スタンダードセルメモリの実測評価

阿部佑貴, 小林和淑, 塩見準, 越智裕之

DAシンポジウム2021　p. 3-8　2021/09　Research paper (conference, symposium, etc.)

幅広い動作性能領域で最小エネルギー動作点を追跡するアルゴリズムの近似演算に基づく高効率実装

園田翔也, 塩見準, 小野寺秀俊

DAシンポジウム2021　p. 24-31　2021/09　Research paper (conference, symposium, etc.)

タスクのリアルタイム応答を保証する近似最小エネルギー点追跡

小森工, 増田豊, 塩見準, 石原亨

第34 回回路とシステムワークショップ　p. 178-183　2021/08　Research paper (conference, symposium, etc.)

Integration of Minimum Energy Point Tracking and Soft Real-Time Scheduling for Edge Computing

Takumi Komori, Yutaka Masuda, Jun Shiomi, Tohru Ishihara

Proceedings of the 22nd International Symposium on Quality Electronic Design (ISQED)　p. 300-306　2021/04/08　Research paper (international conference proceedings)

Minimum Energy Point Tracking over a Wide Operating Performance Region

Shoya Sonoda, Jun Shiomi, Hidetoshi Onodera

Proceedings of the 23rd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)　p. 2-7　2021/03/29　Research paper (international conference proceedings)

Optical-electronic implementation of artificial neural network for ultrafast and accurate inference processing

Naoki Hattori, Yutaka Masuda, Tohru Ishihara, Jun Shiomi, Akihiko Shinya, Masaya Notomi

SPIE 11703, AI and Optical Data Sciences II　p. 85-101　2021/03/05　Research paper (international conference proceedings)

FiCCを用いた不揮発スタンダードセルメモリ

阿部佑貴, 小林和淑, 塩見準, 越智裕之

電子情報通信学会総合大会　2021/03　Research paper (conference, symposium, etc.)

A DLL-based Body Bias Generator for Minimum Energy Operation with Independent P-well and N-well Bias

Kentaro Nagai, Jun Shiomi, Hidetoshi Onodera

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)　p. 31-34　2020/12　Research paper (international conference proceedings)

An Optical Accelerator for Deep Neural Network Based on Integrated Nanophotonics

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

IEEE International Conference on Rebooting Computing (ICRC)　p. 95-101　2020/12　Research paper (international conference proceedings)

MOSDA: On-chip Memory Optimized Sparse Deep Neural Network Accelerator with Efficient Index Matching

Hongjie Xu, Jun Shiomi, Hidetoshi Onodera

IEEE Open Journal of Circuits and Systems　p. 1-1　2020/11　Research paper (scientific journal)

幅広い動作性能領域で最小エネルギー動作を実現する電源電圧としきい値電圧の動的決定手法

園田翔也, 塩見準, 小野寺秀俊

DAシンポジウム2020　p. 52-58　2020/09/08　Research paper (conference, symposium, etc.)

部分積の効率的な累算によりメモリ容量を削減した畳み込み演算アクセラレータ

徐宏傑, 塩見準, 小野寺秀俊

DAシンポジウム2020　p. 28-35　2020/09/07　Research paper (conference, symposium, etc.)

集積ナノフォトニクスに基づく耐タンパ光論理回路

塩見準, 木次修也, 董博語, 小野寺秀俊, 新家昭彦, 納富雅也

DAシンポジウム2020　p. 2-7　2020/09/07　Research paper (conference, symposium, etc.)

Dynamic Supply and Threshold Voltage Scaling Towards Runtime Energy Optimization over a Wide Operating Performance Region

Shoya Sonoda, Jun Shiomi, Hidetoshi Onodera

IEEE International System-on-Chip Conference (SOCC)　p. 236-241　2020/09　Research paper (international conference proceedings)

On-chip Memory Optimized CNN Accelerator with Efficient Partial-sum Accumulation

Hongjie Xu, Jun Shiomi, Hidetoshi Onodera

ACM Great Lakes Symposium on VLSI (GLSVLSI)　p. 21-26　2020/09　Research paper (international conference proceedings)

集積ナノフォトニクスに基づく光ニューラルネットワークを対象とした回路アーキテクチャ探索

服部直樹, 増田豊, 石原亨, 塩見準, 新家昭彦, 納富雅也

第33回 回路とシステムワークショップ　p. 10-15　2020/08　Research paper (conference, symposium, etc.)

Real-time Minimum Energy Point Tracking Using a Predetermined Optimal Voltage Setting Strategy

Khyati Kiyawat, Yutaka Masuda, Jun Shiomi, Tohru Ishihara

IEEE Computer Society Annual Symposium on VLSI (ISVLSI)　p. 415-421　2020/07　Research paper (international conference proceedings)

A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing

Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

IEEE Computer Society Annual Symposium on VLSI (ISVLSI)　p. 488-493　2020/07　Research paper (international conference proceedings)

ニューラルネットワークの集積ナノフォトニクス実装に適した回路構造探索

服部直樹, 増田豊, 石原亨, 塩見準, 新家昭彦, 納富雅也

信学技報　Vol. 119　No. 443　p. 251-256　2020/03　Research paper (conference, symposium, etc.)

Methods for Reducing Power and Area of BDD-Based Optical Logic Circuits

Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E102-A　No. 12　p. 1751-1759　2019/12　Research paper (scientific journal)

On-Chip Cache Architecture Exploiting Hybrid Memory Structures for Near-Threshold Computing

Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E102-A　No. 12　p. 1741-1750　2019/12　Research paper (scientific journal)

An Optical Neural Network Architecture based on Highly Parallelized WDM-Multiplier-Accumulator

Tohru Ishihara, Jun Shiomi, Naoki Hattori, Yutaka Masuda, Akihiko Shinya, Masaya Notomi

Photonics-Optics Technology Oriented Networking, Information, and Computing Systems (PHOTONICS) at The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC19)　2019/11　Research paper (international conference proceedings)

集積ナノフォトニクスに基づく近似並列乗算器を用いた低レイテンシ光ニューラルネットワーク

塩見準, 石原亨, 小野寺秀俊, 新家昭彦, 納富雅也

デザインガイア2019　p. 1-6　2019/11　Research paper (conference, symposium, etc.)

P/Nウェル電圧を独立に制御可能なDLL型基板電圧生成回路

永井 健太郎, 塩見 準, 小野寺 秀俊

DAシンポジウム2019　p. 220-225　2019/08　Research paper (conference, symposium, etc.)

広範囲な電圧領域で動作するフリップフロップのタイミング特性モデル

内田 翼, 塩見 準, 石原 亨, 小野寺 秀俊

DAシンポジウム2019　Vol. 2019　p. 172-177　2019/08　Research paper (conference, symposium, etc.)

二分決定グラフに基づく光論理回路の消費電力削減手法

松尾 亮祐, 塩見 準, 小野寺 秀俊, 石原 亨, 新家 昭彦, 納富 雅也

DAシンポジウム2019　p. 87-92　2019/08　Research paper (conference, symposium, etc.)

An Optical Integrated Circuit Design Method for Modified Booth Multiplier Using Wavelength Division Multiplexing

Vol. 2019　p. 81-86　2019/08　Research paper (conference, symposium, etc.)

先端微細加工プロセスで実現するビアスイッチFPGAの性能解析

荒木 佑介, 松田 崇史, 塩見 準, 小野寺 秀俊

DAシンポジウム2019　p. 33-38　2019/08　Research paper (conference, symposium, etc.)

A Design Method of a Cell-Based Amplifier for Body Bias Generation

Takuya Koyanagi, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEICE Transactions on IEICE Transactions on Electronics　Vol. E102-C　No. 7　p. 565-572　2019/07　Research paper (scientific journal)

リアルタイム電圧最適化によるマルチタスク処理の消費エネルギー最小化

塩見準, 石原亨, 小野寺秀俊

ETNET2019　2019/03　Research paper (conference, symposium, etc.)

Methods for Reducing Power and Area of BDD-based Optical Logic Circuits

Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

IEICE Technical Report, pp 139-144　2019/02　Research paper (conference, symposium, etc.)

Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing.

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

Integration(Integr.)　Vol. 65　p. 201-210　2019　Research paper (scientific journal)

BDD-based Synthesis of Optical Logic Circuits Exploiting Wavelength Division Multiplexing

Ryosuke Matsuo, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

Asia and South Pacific Design Automation Conference (ASP-DAC)　p. 203-209　2019/01　Research paper (international conference proceedings)

An Integrated Optical Parallel Multiplier Exploiting Approximate Binary Logarithms towards Light Speed Data Processing

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

IEEE International Conference on Rebooting Computing (ICRC)　p. 62-67　2018/11　Research paper (international conference proceedings)

A Light Speed Optical Approximate Parallel Multiplier and Its Applications

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera, Akihiko Shinya, Masaya Notomi

PHOTONICS: Photonics-Optics Technology Oriented Networking, Information, and Computing Systems　2018/10　Research paper (conference, symposium, etc.)

波長多重を用いた二分決定グラフに基づく光論理回路の合成

松尾亮祐, 塩見凖, 石原亨, 小野寺秀俊, 新家昭彦, 納富雅也

DAシンポジウム2018　Vol. 2018　p. 51-56　2018/08　Research paper (conference, symposium, etc.)

A Software Implementation of Minimum Energy Point Tracking Algorithm for Microprocessors

Shengyu Liu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

DA Synposium 2018　p. 166-171　2018/08　Research paper (conference, symposium, etc.)

セルベース設計に適合した基板バイアス制御用増幅回路の設計手法

小柳卓也, 塩見準, 石原亨, 小野寺秀俊

DAシンポジウム2018　p. 172-177　2018/08　Research paper (conference, symposium, etc.)

複数電源ドメインの実行時電圧制御によるCMOS LSIの消費エネルギー最小化

塩見準, 石原亨, 小野寺秀俊

DAシンポジウム2018　Vol. 2018　p. 160-165　2018/08　Research paper (conference, symposium, etc.)

集積ナノフォトニクスに基づく近似二進対数を用いた低レイテンシ光並列乗算器

塩見準, 石原亨, 小野寺秀俊, 新家昭彦, 納富雅也

DAシンポジウム2018　p. 57-62　2018/08　Research paper (conference, symposium, etc.)

波長多重技術を活用したBDDに基づく光論理回路の設計手法

松尾亮祐, 塩見準, 石原亨, 小野寺秀俊, 新家昭彦, 納富雅也

DAシンポジウム2018　p. 51-56　2018/08　Research paper (conference, symposium, etc.)

Maximizing Energy Efficiency of On-Chip Caches Exploiting Hybrid Memory Structure

Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)　p. 237-242　2018/07　Research paper (international conference proceedings)

Minimum Energy Point Tracking with All-Digital On-Chip Sensors

Jun Shiomi, Shu Hokimoto, Tohru Ishihara, Hidetoshi Onodera

ASP Journal of Low Power Electronics, vol 14, no 2　2018/06　Research paper (scientific journal)

幅広い動作環境にわたってLSIの最大遅延特性を追跡するクリティカルパスレプリカの構成法

福田 展和, 塩見 準, 石原 亨, 小野寺 秀俊

第184回システムとLSIの設計技術研究発表会,2018-SLDM-184,5,1-6　2018/05　Research paper (conference, symposium, etc.)

All-Digital On-Chip Heterogeneous Sensors for Tracking the Minimum Energy Point of Processors

Shu Hokimoto, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

International Conference on Microelectronic Test Structures (ICMTS), pp. 128-133　2018/03　Research paper (international conference proceedings)

Individual Voltage Scaling in Logic and Memory Circuits towards Runtime Energy Optimization in Processors

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), pp. 45 - 50　2018/03　Research paper (international conference proceedings)

A Hybrid Caching System Using SRAM and Standard-Cell Memory for Energy-Efficient Near-Threshold Circuits

Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp. 56-61　2018/03　Research paper (international conference proceedings)

選択的活性化によるスタンダードセルメモリの低消費エネルギー化

塩見準, 石原亨, 小野寺秀俊

電子情報通信学会技術研究報告, vol 117, no 455, pp. 211 - 216, 2018/03　2018/03　Research paper (conference, symposium, etc.)

Pin accessibility evaluating model for improving routability of VLSI designs

Hong-Yan Su, Shinichi Nishizawa, Yan-Shiun Wu, Jun Shiomi, Yih-Lang Li, Hidetoshi Onodera

International System on Chip Conference　Vol. 2017-　p. 56-61　2017/12/18　Research paper (international conference proceedings)

A necessary and sufficient condition of supply and threshold voltages in CMOS circuits for minimum energy point operation

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E100A　No. 12　p. 2764-2775　2017/12/01　Research paper (international conference proceedings)

最小エネルギー動作点追跡アルゴリズムの実チップ評価

保木本 修, 塩見 準, 石原 亨, 小野寺 秀俊

DAシンポジウム2017, pp. 145 - 150, 2017/08　2017/08　Research paper (conference, symposium, etc.)

アクセス頻度に応じた電圧調節によるオンチップメモリの消費エネルギー最小化

塩見 準, 石原 亨, 小野寺 秀俊

DAシンポジウム2017, pp. 151 - 156, 2017/08　2017/08　Research paper (conference, symposium, etc.)

ロジック部およびメモリ部の独立電圧制御によるプロセッサの消費エネルギー最小化

塩見準, 石原亨, 小野寺秀俊

組込み技術とネットワークに関するワークショップ ETNET2017　2017/03　Research paper (conference, symposium, etc.)

Fully digital on-chip memory using minimum height standard cells for near-threshold voltage computing

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

Proceedings - 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2016　p. 44-49　2017/01/25　Research paper (international conference proceedings)

Analytical Stability Modeling for CMOS Latches in Low Voltage Operation

Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E99A　No. 12　p. 2463-2472　2016/12　Research paper (scientific journal)

A Processor Architecture Integrating Voltage Scalable On-Chip Memories for Individual Tracking of Minimum Energy Points in Logic and Memory

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp. 36-41　2016/10　Research paper (international conference proceedings)

広範囲な動作性能領域においてエネルギー最小点追跡を可能にするオンチップメモリ

塩見準, 石原亨, 小野寺秀俊

情報処理学会DAシンポジウム2016論文集, pp. 91-96, 2016/09　2016/09　Research paper (conference, symposium, etc.)

CMOS LSIにおけるエネルギー最小点追跡のための電源電圧としきい値電圧の動的調節指針

竹下俊宏, 塩見準, 石原亨, 小野寺秀俊

組込み技術とネットワークに関するワークショップ ETNET2016　2016/03　Research paper (conference, symposium, etc.)

サブスレッショルド領域で動作するラッチ回路の動作安定性解析

鎌苅竜也, 塩見準, 石原亨, 小野寺秀俊

電子情報通信会技術報告 VLD2015-131, pp. 117-117　2016/02　Research paper (conference, symposium, etc.)

A Closed-Form Stability Model for Cross-Coupled Inverters Operating in Sub-Threshold Voltage Region

Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

2016 21ST ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)　p. 691-696　2016　Research paper (international conference proceedings)

Variability- and Correlation-Aware Logical Effort for Near-Threshold Circuit Design

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

PROCEEDINGS OF THE SEVENTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN ISQED 2016　p. 18-23　2016　Research paper (international conference proceedings)

Fully Digital On-Chip Memory Using Minimum Height Standard Cells for Near-Threshold Voltage Computing

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

PROCEEDINGS OF 2016 26TH INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS)　p. 44-49　2016　Research paper (international conference proceedings)

Wide-Supply-Range All-Digital Leakage Variation Sensor for On-Chip Process and Temperature Monitoring

A. K. M. Mahfuzul Islam, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEEE JOURNAL OF SOLID-STATE CIRCUITS　Vol. 50　No. 11　p. 2475-2490　2015/11　Research paper (scientific journal)

統計的タイミングモデルに基づくニアスレッショルド回路のゲートサイジング

塩見準, 石原亨, 小野寺秀俊

情報処理学会DAシンポジウム2015論文集, pp. 137-142, 2015/08　2015/08　Research paper (conference, symposium, etc.)

サブスレッショルド領域におけるラッチ回路の動作安定性モデル

鎌苅竜也, 塩見準, 石原亨, 小野寺秀俊

情報処理学会DAシンポジウム2015論文集, pp. 187-192, 2015/08　2015/08　Research paper (conference, symposium, etc.)

Statistical Timing Modeling Based on a Lognormal Distribution Model for Near-Threshold Circuit Optimization

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E98A　No. 7　p. 1455-1466　2015/07　Research paper (scientific journal)

A Variability-Aware Energy-Efficient On-Chip Memory for Near-Threshold Operation using Cell-Based Structure

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp. 205-210　2015/03　Research paper (international conference proceedings)

ニアスレッショルド回路設計のための基本定理

塩見準, 石原亨, 小野寺秀俊

電子情報通信会技術報告 VLD2014-172, pp. 109–114　2015/03　Research paper (conference, symposium, etc.)

Microarchitectural-Level Statistical Timing Models for Near-Threshold Circuit Design

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

2015 20TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC)　p. 87-93　2015　Research paper (international conference proceedings)

An Energy-Efficient On-Chip Memory Structure for Variability-Aware Near-Threshold Operation

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

PROCEEDINGS OF THE SIXTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2015)　p. 23-28　2015　Research paper (international conference proceedings)

ニアスレッショルド電圧動作に適した単一電源で動作する高歩留まりオン チップメモリの設計

塩見準, 石原亨, 小野寺秀俊

情報処理学会DAシンポジウム2014論文集, pp. 103-108, 2014/08　2014/08　Research paper (conference, symposium, etc.)

Wide-Supply-Range All-Digital Leakage Variation Sensor for On-chip Process and Temperature Monitoring

A. K. M. Mahfuzul Islam, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera

2014 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE (A-SSCC)　p. 45-48　2014　Research paper (international conference proceedings)