顔写真

PHOTO

Matsuoka Toshimasa
松岡　俊匡
Matsuoka Toshimasa
松岡　俊匡
Institutional repository
Graduate School of Engineering　Division of Electrical, Electronic and Information Engineering, Associate Professor

keyword Integrated Circuits，Semiconductor Devices

Institutional repository

Research History 5

  1. 2007/04 - Present
    Osaka University　Graduate School of Engineering　Associate Professor

  2. 2004/02 - 2007/03
    Osaka University　Graduate School of Engineering　Associate Professor

  3. 2000/09 - 2004/01
    Osaka University　Graduate School of Engineering　Lecturer

  4. 1999/09 - 2000/08
    Osaka University　Graduate School of Engineering　Researcher

  5. 1991/04 - 1998/10
    Sharp Corporation

Committee Memberships 18

  1. IEICE CAS　Committee Member　Academic society

    2017/05 - Present

  2. IEEJ ECT　Committee Member　Academic society

    2006/05 - 2020/04

  3. The International Conference on Analog VLSI Circuits (AVIC 2019)　Technical Program Committee Chair　Academic society

    2019 - 2019

  4. The 7th International Conference on Integrated Circuits, Design, and Verification (ICDV2017)　Technical Program Committee Chair　Academic society

    2017 - 2017

  5. IEICE ICD　Secretary　Academic society

    2011/05 - 2014/04

  6. IEICE　Associate Editor (EC)　Academic society

    2007/05 - 2013/04

  7. IEICE ICD　Secretary　Academic society

    2009/05 - 2011/04

  8. IEICE　IEICE ELEX Associate Editor　Academic society

    2007/05 - 2010/04

  9. JSAP Kansai Section　Secretary　Academic society

    2008/04 - 2010/03

  10. IEICE ICD　Committee Member　Academic society

    2003/05 - 2009/04

  11. IEICE Si Analog RF　Committee Member　Academic society

    2007/04 - 2009/03

  12. International Conference on Solid State Devices and Materials (SSDM)　Program Committee Co-Chair (Area 5:Advanced Circuits and Systems)　Academic society

    2008 - 2009

  13. IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK) (IEEE EDS Kansai Chapter)　Committee Member　Academic society

    2003 - 2009

  14. IEICE Si Analog RF　Secretary　Academic society

    2004/02 - 2007/03

  15. International Conference on Solid State Devices and Materials (SSDM)　Program Committee Member (Area 5:Advanced Circuits and Systems)　Academic society

    2007 - 2007

  16. IEEE EDS Kansai Chapter　Secretary　Academic society

    2005/01 - 2006/12

  17. IEEE EDS Kansai Chapter　Treasurer　Academic society

    2003/01 - 2004/12

  18. 電子情報通信学会　エレクトロニクスソサイエティ学術奨励賞選定委員会投票委員　Academic society

    2005 -

Professional Memberships 4

  1. IEEJ

  2. IEICE

  3. IEEE

  4. The Japan Society of Applied Physics

Research Areas 1

  1. Manufacturing technology (mechanical, electrical/electronic, chemical engineering) / Electronic devices and equipment /

Awards 9

  1. 電子情報通信学会 論文賞

    2011

  2. LSIとシステムのワークショップ2011 優秀ポスター賞

    2011

  3. 平成22年度工学研究科長表彰

    2011

  4. 第8回共同研究賞

    2010

  5. 第10回LSI IPアワード研究助成賞

    2008

  6. 第6回 LSI IPデザイン・アワード IP賞

    2004

  7. Low Power Design Contest Award, International Symposium on Low Power Electronics and Design

    2001

  8. 第3回LSI IPデザイン・アワード 開発奨励賞

    2001

  9. 第4回システムLSI琵琶湖ワークショップ優秀ポスター賞

    2000

Papers 188

  1. A Multi-Channel Biomedical Sensor System With System-Level Chopping and Stochastic A/D Conversion

    Yusaku HIRAI, Toshimasa MATSUOKA, Takatsugu KAMATA, Sadahiro TANI, Takao ONOYE

    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　2024　Research paper (scientific journal)

    Publisher: Institute of Electronics, Information and Communications Engineers (IEICE)

  2. Design and Emulation of All-Digital Phase-Locked Loop on FPGA

    Saichandrateja Radhapuram, Takuya Yoshihara, Toshimasa Matsuoka

    Electronics　Vol. 8　No. 11　2019/11　Research paper (scientific journal)

    Publisher: MDPI

  3. A Biomedical Sensor System with Stochastic A/D Conversion and Error Correction by Machine Learning

    Vol. 7　2019/02　Research paper (scientific journal)

    Publisher:

  4. A software level calibration based on Bayesian regression for a successive stochastic approximation analog-to-digital converter system

    Keiji Tatsumi, Toshimasa Matsuoka

    IEEE Transactions on Cybernetics　2018/03　Research paper (scientific journal)

  5. Behavior-level analysis of a successive stochastic approximation analog-to-digital conversion system for multi-channel biomedical data acquisition

    Sadahiro Tani, Toshimasa Matsuoka, Yusaku Hirai, Toshifumi Kurata, Keiji Tatsumi, Tomohiro Asano, Masayuki Ueda, Takatsugu Kamata

    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences　Vol. E100A　No. 10　p. 2073-2085　2017/10/01　Research paper (scientific journal)

    Publisher: Institute of Electronics, Information and Communication, Engineers, IEICE

  6. A calibration with an adaptive data selection based on Bayes estimation for a successive stochastic approximation ADC system

    Keiji Tatsumi, Toshimasa Matsuoka, Sadahiro Tani

    IFSA-SCIS 2017 - Joint 17th World Congress of International Fuzzy Systems Association and 9th International Conference on Soft Computing and Intelligent Systems　2017/08/30　Research paper (international conference proceedings)

    Publisher: Institute of Electrical and Electronics Engineers Inc.

  7. An analog front-end employing 87 dB SNDR stochastic SAR-ADC for a biomedical sensor

    Takatsugu Kamata, Masayuki Ueda, Yusaku Hirai, Sadahiro Tani, Tomohiro Asano, Shodai Isami, Toshifumi Kurata, Keiji Tatsumi, Toshimasa Matsuoka

    Proceedings - 2017 IEEE 15th International New Circuits and Systems Conference, NEWCAS 2017　p. 301-304　2017/08/11　Research paper (international conference proceedings)

    Publisher: Institute of Electrical and Electronics Engineers Inc.

  8. A study on performance improvement of RF transmitter IC using genetic algorithm

    Shodai Isami, Takatsugu Kamata, Jungnam Bae, Sadahiro Tani, Jun Wang, Kenji Ohara, Toshimasa Matsuoka

    MICROWAVE AND OPTICAL TECHNOLOGY LETTERS　Vol. 58　No. 12　p. 2905-2912　2016/12　Research paper (scientific journal)

  9. A Software Level Calibration for a Successive Stochastic Approximation Analog-to-Digital Conversion System

    K.Tatsumi, T. Matsuoka, S. Tani

    2016/07

  10. A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices

    Jungnam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Weimin Wang, Takao Kihara, Toshimasa Matsuoka

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E99-C　No. 4　p. 431-439　2016/04　Research paper (scientific journal)

  11. Erratum: Analysis of a controller-based all-digital phase-locked loop (Far East Journal of Electronics and Communications (2015) 15:1 (57-73))

    Saichandrateja Radhapuram, Jungnam Bae, Ikkyun Jo, Weimin Wang, Toshimasa Matsuoka

    Far East Journal of Electronics and Communications　Vol. 16　No. 1　p. 199-201　2016/03/01　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  12. An offset distribution modification technique of stochastic flash ADC

    Tomohiro Asano, Yusaku Hirai, Sadahiro Tani, Shinya Yano, Ikkyun Jo, Toshimasa Matsuoka

    IEICE ELECTRONICS EXPRESS　Vol. 13　No. 6　2016/03　Research paper (scientific journal)

  13. Incremental Learning for a Calibration of a High-precision SAR-ADC by using the Inverse Calibration and Bayesian Regression

    Keiji Tatsumi, Toshimasa Matsuoka, Sadahiro Tani

    Vol. 29　No. 3　p. 136-142　2016/03　Research paper (scientific journal)

  14. Incremental learning for a calibration of a high-precision SAR-ADC by using the Bayesian Linear Regression

    Toshifumi Kurata, Keiji Tatsumi, Tetsuzo Tanino, Yusaku Hirai, Toshimasa Matsuoka, Sadahiro Tani

    Transactions of the Institute of Systems, Control and Information Engineers　Vol. 29　No. 2　p. 76-85　2016/02　Research paper (scientific journal)

  15. A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator

    Jungnam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E98-C　No. 12　p. 1179-1186　2015/12　Research paper (scientific journal)

  16. A capacitor-less transient-responseimproved CMOS low-dropout regulator

    Benchuan Wang, Toshimasa Matsuoka, Honglai Wang, Yujie Dai, Jun Wang, Ikkyun Jo

    Far East Journal of Electronics and Communications　Vol. 15　No. 1　p. 35-56　2015/09/01　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  17. A Low-Voltage Design of Digitally-Controlled Oscillator Based on the g(m)/I-D Methodology

    Jungnam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka

    2015 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT)　p. 187-189　2015/08　Research paper (international conference proceedings)

  18. ANALYSIS OF A CONTROLLER-BASED ALL-DIGITAL PHASE-LOCKED LOOP

    Saichandrateja Radhapuram, Jungnam Bae, Ikkyun Jo, Weimin Wang, Toshimasa Matsuoka

    Far East Journal of Electronics and Communications　Vol. 15　No. 1　p. 57-73　2015/07/17　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  19. A DYNAMIC LATCHED COMPARATOR WITH BUILT-IN OFFSET CALIBRATION

    Ji Cui, Sadahiro Tani, Kenji Ohara, Yusaku Hirai, Toshimasa Matsuoka

    Far East Journal of Electronics and Communications　Vol. 14　No. 2　p. 105-115　2015/06/11　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  20. Low-power wireless on-chip microparticle manipulation system

    Yoshiaki Dei, Yasushi Kishiwada, Rie Yamane, Taisuke Inoue, Toshimasa Matsuoka

    JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 54　No. 4　p. 04DE10-04DE10　2015/04　Research paper (scientific journal)

  21. A low-power CMOS programmable frequency divider with novel retiming scheme

    Saichandrateja Radhapuram, Jungnam Bae, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka

    IEICE ELECTRONICS EXPRESS　Vol. 12　No. 6　p. 20141233-20141233　2015/03　Research paper (scientific journal)

  22. A Low-Voltage Design of Controller-Based ADPLL for Implantable Biomedical Devices

    Jungnam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka

    2015 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS)　p. 478-481　2015　Research paper (international conference proceedings)

  23. Accurate Extraction of Effective Gate Resistance in RF MOSFET

    Ikkyun Jo, Toshimasa Matsuoka

    Circuits and Systems　Vol. 06　No. 05　p. 143-151　2015　Research paper (scientific journal)

    Publisher: Scientific Research Publishing, Inc.

  24. A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

    Jungnam Bae, Saichandrateja Radhapuram, Ikkyun Jo, Takao Kihara, Toshimasa Matsuoka

    Circuits and Systems　Vol. 06　No. 05　p. 136-142　2015　Research paper (scientific journal)

    Publisher: Scientific Research Publishing, Inc.

  25. A Delta-Sigma ADC with Stochastic Quantization

    Yusaku Hirai, Shinya Yano, Toshimasa Matsuoka

    IPSJ Transactions on System LSI Design Methodology　Vol. 8　No. 0　p. 123-130　2015　Research paper (scientific journal)

    Publisher: Information Processing Society of Japan

  26. RF front-end architecture for a triple-band CMOS GPS receiver

    Ikkyun Jo, Jungnam Bae, Toshimasa Matsuoka, Takuji Ebinuma

    MICROELECTRONICS JOURNAL　Vol. 46　No. 1　p. 27-35　2015/01　Research paper (scientific journal)

  27. DIGITAL IMPLEMENTATION OF THIRD HARMONIC DISTORTION REDUCTION IN FOURTH-ORDER ΔΣ D/A CONVERTER

    Wang Jun, Matsuoka Toshimasa, Ohara Kenji, Kamata Takatsugu

    Far East Journal of Electronics and Communications　Vol. 13　No. 2　p. 91-97　2014/12　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  28. On-chip Microparticle Manipulation with Efficient Wireless Power Transfer

    Yoshiaki Dei, Yasushi Kishiwada, Rie Yamane, Taisuke Inoue, Toshimasa Matsuoka

    Extended Abstracts of International Conference on Solid State Devices and Materials　2014/09　Research paper (international conference proceedings)

    Publisher: 応用物理学会

  29. A Capacitance Detection Circuit for On-chip Microparticle Manipulation

    Rie Yamane, Hirosuke Iwasaki, Yoshiaki Dei, Ji Cui, Toshimasa Matsuoka

    2014 IEEE INTERNATIONAL MEETING FOR FUTURE OF ELECTRON DEVICES, KANSAI (IMFEDK)　2014/06　Research paper (international conference proceedings)

  30. Extra Loop Delay Compensation for Hybrid Delta-Sigma Modulators

    Yusaku Hirai, Kenji Ohara, Toshimasa Matsuoka

    2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)　p. 2353-2356　2014/06　Research paper (international conference proceedings)

  31. Source-side injection single-polysilicon split-gate flash memory

    Yoshimitsu Yamauchi, Yoshinari Kamakura, Toshimasa Matsuoka, Naoki Ueda

    JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 53　No. 3　2014/03　Research paper (scientific journal)

  32. A Calibration Algorithm for a High-Precision Analog-to-Digital Converter using a Machine Learning

    Kurata Toshifumi, Tatsumi Keiji, Tanino Tetuzo, Hirai Yusaku, Matsuoka Toshimasa, Tani Sadahiro

    Proceedings of the Japan Joint Automatic Control Conference　Vol. 57　p. 1394-1397　2014

    Publisher: The Japan Joint Automatic Control Conference

  33. Extra loop delay compensation for hybrid delta-sigma modulators

    Yusaku Hirai, Kenji Ohara, Toshimasa Matsuoka

    Proceedings - IEEE International Symposium on Circuits and Systems　p. 2353-2356　2014　Research paper (international conference proceedings)

    Publisher: Institute of Electrical and Electronics Engineers Inc.

  34. Toward 1Gfps: Evolution of Ultra-high-speed Image Sensors -ISIS, BSI, Multi-Collection Gates, and 3D-stacking

    T. G. Etoh, V. T. S. Dao, K. Shimonomura, E. Charbon, C. Zhang, Y. Kamakura, T. Matsuoka

    2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)　2014　Research paper (international conference proceedings)

  35. Study of Novel Floating-Gate Oxide Semiconductor Memory Using Indium-Gallium-Zinc Oxide for Low-Power System-on-Panel Applications

    Yoshimitsu Yamauchi, Yoshinari Kamakura, Yousuke Isagi, Toshimasa Matsuoka, Satoshi Malotaux

    JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 52　No. 9　2013/09　Research paper (scientific journal)

  36. A Source-Side Injection Single-Poly Split-Gate Cell Technology for Embedded Flash Memory

    Yoshimitsu Yamauchi, Yoshinari Kamakura, Toshimasa Matsuoka

    Extended Abstracts of International Conference on Solid State Devices and Materials　p. 110-111　2013/09　Research paper (international conference proceedings)

  37. Scalable Virtual-Ground Multilevel-Cell Floating-Gate Flash Memory

    Yoshimitsu Yamauchi, Yoshinari Kamakura, Toshimasa Matsuoka

    IEEE TRANSACTIONS ON ELECTRON DEVICES　Vol. 60　No. 8　p. 2518-2524　2013/08　Research paper (scientific journal)

  38. Design of triple-band CMOS GPS receiver RF front-end

    Ikkyun Jo, Jungnam Bae, Toshimasa Matsuoka, Takuji Ebinuma

    IEICE ELECTRONICS EXPRESS　Vol. 10　No. 7　2013/04　Research paper (scientific journal)

  39. A low-power technique for pipelined ADCs with programmable gain amplification

    Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 10　No. 1　2013　Research paper (scientific journal)

  40. Low-power wireless on-chip microparticle manipulation with process variation compensation

    Yasushi Kishiwada, Hirosuke Iwasaki, Shun Ueda, Yoshiaki Dei, Yusuke Miyawaki, Toshimasa Matsuoka

    IEICE ELECTRONICS EXPRESS　Vol. 10　No. 13　2013　Research paper (scientific journal)

  41. Design of a high-speed-sampling stochastic flash analog-to-digital converter using device mismatch

    Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Kenji Taniguchi

    ELECTRONICS AND COMMUNICATIONS IN JAPAN　Vol. 96　No. 1　p. 51-62　2013/01　Research paper (scientific journal)

  42. An Analysis of Capacitor Mismatch in Segment of MDAC at Pipelined ADC with Merged Capacitor Switching Technique

    Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J95-C　No. 10　p. 235-239　2012/10　Research paper (scientific journal)

    Publisher: IEICE

  43. A Low Power Technique for Programmable Gain Amplifier with Controllable input/output Transconductance and Compensation Capacitor

    Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J95-C　No. 7　p. 131-138　2012/07　Research paper (scientific journal)

    Publisher: IEICE

  44. A CMOS LOW-DROPOUT REGULATOR WITH A DYNAMIC-BIASED GAIN STAGE

    Taniguchi Kenji, Lv Yingjie, Matsuoka Toshimasa, Wang Jun, Wang Honglai, Dai Yujie, Zhang Xiaoxing

    Far East Journal of Electronics and Communications　Vol. 7　No. 2　p. 67-81　2012/04　Research paper (scientific journal)

    Publisher: Pushpa Publishing House

  45. A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators

    Daisuke Kanemoto, Yu Tamura, Bogoda A. U. K. Indika, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 9　No. 6　p. 572-579　2012/03　Research paper (scientific journal)

  46. A Rotated Partial Data Weighted Averaging Technique for Delta-Sigma Digital-to-Analog Convetrers

    Yu Tamura, Daisuke Kanemoto, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron (Japanese Edition)　Vol. J95-C　No. 1　p. 9-17　2012/01　Research paper (scientific journal)

    Publisher: The Institute of Electronics, Information and Communication Engineers

  47. Wireless on-chip microparticle manipulation using pulse-driven dielectrophoresis

    Shun Ueda, Yusuke Miyawaki, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 9　No. 1　p. 16-22　2012/01　Research paper (scientific journal)

  48. Process variation compensation with effective gate-width tuning for low-voltage CMOS digital circuits

    Yasushi Kishiwada, Shun Ueda, Yusuke Miyawaki, Toshimasa Matsuoka

    2012 IEEE International Meeting for Future of Electron Devices, Kansai　p. 166-167　2012　Research paper (international conference proceedings)

  49. A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation

    Hisayasu Sato, Takaya Maruyama, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E94-C　No. 8　p. 1311-1319　2011/08　Research paper (scientific journal)

  50. A low-voltage low-power CMOS voltage reference based on subthreshold MOSFETs

    Honglai Wang, Xiaoxing Zhang, Yujie Dai, Yingjie Lü, Toshimasa Matsuoka, Wang Jun, Kenji Taniguchi

    Journal of Semiconductors　Vol. 32　No. 8　2011/08　Research paper (scientific journal)

  51. Design of Triple-band GPS CMOS Receiver

    Ikkyun Jo, Toshimasa Matsuoka, Takuji Ebinuma

    Proc. The 2011 International Conference on Integrated Circuits and Devices in Vietnam　2011/08　Research paper (international conference proceedings)

    Publisher:

  52. Low-Power Zero-IF Full-segment ISDB-T CMOS Tuner with Tenth-order Baseband Filters

    Takatsugu Kamata, Kazunori Okui, Masahiko Fukasawa, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS　Vol. 57　No. 2　p. 403-410　2011/05　Research paper (scientific journal)

  53. Design of a 500-MS/s stochastic signal detection circuit using a non-linearity reduction technique in a 65-nm CMOS process

    Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 8　No. 6　p. 353-359　2011/03　Research paper (scientific journal)

  54. Analysis on Influence of Capacitor Switching in Digitally-Controlled Oscillator Using Behavior-Level Simulation

    Genki Tsuruyama, Hyunju Ham, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Fundamentals (Japanese Edition)　Vol. J94-A　No. 2　p. 145-148　2011/02

    Publisher: The Institute of Electronics, Information and Communication Engineers

  55. A Design of High-Speed-Sampling Stochastic Flash Analog-to-Digital Converter Utilizing Device Mismatch

    Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Kenji Taniguchi

    IEEJ Transactions on Electronics, Information and Systems　Vol. 131　No. 11　p. 1848-1857　2011　Research paper (scientific journal)

    Publisher: Institute of Electrical Engineers of Japan (IEE Japan)

  56. Application of Kelvin Technique in A Gas-Sensor Read-Out Circuit

    Hiroaki Choji, Toshimasa Matsuoka, Jongpil Im, Jun Wang, Kenji Taniguchi

    IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING　Vol. 6　No. S1　p. S94-S95　2011/01　Research paper (scientific journal)

  57. A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION

    Jun Wang, Kazuhiro Yasue, Toshimasa Matsuoka, Kenji Taniguchi

    Far East Journal of Electronics and Communications　Vol. 5　No. 1　p. 59-65　2010/09

    Publisher:

  58. Process Variation Compensation Technique for 0.5V Body-Input Comparator

    Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J93-C　No. 9　p. 326-327　2010/09　Research paper (scientific journal)

    Publisher: IEICE

  59. RF Front-end Design for CMOS Terrestrial Wideband TV Tuner IC

    Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS　Vol. 56　No. 3　p. 1340-1348　2010/08　Research paper (scientific journal)

  60. Design of Image Rejection Filter for Wideband TV Tuner IC

    Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J93-C　No. 6　p. 195-206　2010/06　Research paper (scientific journal)

    Publisher: IEICE

  61. Design of a low-voltage CMOS mixer based on variable load technique

    Baolin Wei, Yujie Dai, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 7　No. 7　p. 473-479　2010/04　Research paper (scientific journal)

  62. Characteristics Compensation of Ultra-Low-Voltage CMOS Digital Circuits

    Kazuhiro Yasue, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J93-C　No. 2　p. 75-77　2010/02　Research paper (scientific journal)

    Publisher: IEICE

  63. A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier

    Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E93-C　No. 2　p. 187-199　2010/02

  64. Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation

    Toshimasa Matsuoka, Jun Wang, Takao Kihara, Hyunju Ham, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E93-A　No. 2　p. 356-366　2010/02　Research paper (scientific journal)

  65. Analytical design of a 0.5V 5GHz CMOS LC-VCO

    Fumiaki Yamashita, Toshimasa Matsuoka, Takao Kihara, Isao Takobe, Hae-Ju Park, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 6　No. 14　p. 1025-1031　2009/07　Research paper (scientific journal)

  66. 528mW Zero-IF Full-segment ISDB-T CMOS Tuner with 10th-order channel filters

    Takatsugu Kamata, K. Okui, M. Fukasawa, K. Tanaka, C. Go, N. Motoyama, Toshimasa Matsuoka, Kenji Taniguchi

    2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS　p. 276-277　2009/06　Research paper (international conference proceedings)

  67. Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems

    Hyunju Ham, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E92-A　No. 4　p. 1012-1018　2009/04　Research paper (scientific journal)

  68. A 0.5V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier

    Takao KIHARA, Hae-Ju PARK, Isao TAKOBE, Fumiaki YAMASHITA, Toshimasa MATSUOKA, Kenji TANIGUCHI

    IEICE Transactions on Electronics　Vol. E92-C　No. 4　p. 564-575　2009　Research paper (scientific journal)

    Publisher: Institute of Electronics, Information and Communications Engineers (IEICE)

  69. A 0.5 V Feedforward Delta-Sigma Modulator with Inverter-Based Integrator

    Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    2009 PROCEEDINGS OF ESSCIRC　p. 329-332　2009　Research paper (international conference proceedings)

  70. A High IIP3 Image Rejection Filter with Current Adapted Buffers for a Digital/Analog TV Tuner IC in a 0.25 μm RF-CMOS Technology

    T. Kamata, T. Matsuoka, K. Taniguchi

    Extended Abstracts of the 2008 International Conference on Solid State Devices and Materials　Vol. pp. 76-77　2008/09/24　Research paper (international conference proceedings)

    Publisher: The Japan Society of Applied Physics

  71. Design of a 0.5 V op-amp based on CMOS inverter using floating voltage sources

    Jun Wang, Tuck-Yang Lee, Dong-Gyou Kim, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E91-C　No. 8　p. 1375-1378　2008/08　Research paper (scientific journal)

  72. A novel approach to implement summing function for feedforward Delta-Sigma AD modulator

    Jun Wang, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 5　No. 12　p. 457-463　2008/06　Research paper (scientific journal)

  73. Clock Recovery Circuit with Wideband Input Bitrate Range

    Tsukasa Ida, Tomoyuki Tanaka, Satoshi Nakao, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J91-C　No. 6　p. 349-356　2008/06

    Publisher: IEICE

  74. Study of Subthreshold-Operation CMOS Logic Circuit with Body-Bias-Control

    Kazuhiro Yasue, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE International Meeting for Future of Electron Devices, Kansai, May. 22-23, 2008, Osaka, Japan　p. 95-96　2008/05

  75. A 0.5 V CMOS Low-Noise Amplifier

    Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE International Meeting for Future of Electron Devices, Kansai, May. 22-23, 2008, Osaka, Japan　p. 91-92　2008/05

  76. A 1.0 V, 2.5 mW, transformer noise-canceling UWB CMOS LNA

    Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi

    Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium　p. 493-496　2008　Research paper (international conference proceedings)

  77. Design of A High-Speed BiCMOS Delta-Sigma A/D Converter

    IEEE International Meeting for Future of Electron Devices, Kansai, May. 22-23, 2008, Osaka, Japan　Vol. pp. 89-90　2008

  78. Defects of YBCO grain-boundaries grown on bicrystal

    Yoshihiro Nakatani, Tetsuro Maki, Xiangyan Kong, Akinori Yutani, Hideo Itozaki, Masayuki Abe, Toshimasa Matsuoka

    Proceedings of 1st Global COE International Symposium Electronic Devices Innovation EDIS 2008, January 21-22, 2008, Osaka, Japan　Vol. P-3, 65-66　2008/01

  79. Observation of grain-boundary on bicrystal

    Tetsuro Maki, Yoshihiro Nakatani, Xiangyan Kong, Akinori Yutani, Hideo Itozaki, Masayuki Abe, Toshimasa Matsuoka

    Proceedings of 1st Global COE International Symposium Electronic Devices Innovation EDIS 2008, January 21-22, 2008, Osaka, Japan　Vol. S-8, 179-180　2008/01

  80. A 0.5 V area-efficient transformer folded-cascode low-noise amplifier in 90 nm CMOS

    Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka, Kenji Taniguchi

    2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS　Vol. pp. 21-24　p. 21-24　2008　Research paper (international conference proceedings)

  81. Sub-threshold signal detection using noise statistics for communications applications

    Hyunju Ham, Toshimasa Matsuoka, Kenji Taniguchi

    Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008　Vol. pp. 1167-1170　p. 1167-1170　2008　Research paper (international conference proceedings)

  82. A 1.0 V, 2.5 mW, transformer noise-canceling UWB CMOS LNA

    Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi

    2008 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, VOLS 1 AND 2　Vol. pp. 493-496　p. 443-446　2008

  83. A switched-capacitor programmable gain amplifier using dynamic element matching

    Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi

    IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING　Vol. 2　No. 6　p. 600-607　2007/11

  84. Ultra Low-Power ΔΣ Modulator for Biomedical Sensing Applications

    Tsukasa Ida, Tomoyuki Tanaka, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J90-C　No. 10　p. 662-670　2007/10　Research paper (scientific journal)

    Publisher: The Institute of Electronics, Information and Communication Engineers

  85. Design of Wideband Tuning VCO for TV Receiver System

    Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J90-C　No. 9　p. 634-641　2007/09　Research paper (scientific journal)

    Publisher: IEICE

  86. A Study on Tuning Technique for Variable Bandwidth Gm-C Filter

    Tomoyuki Tanaka, Tsukasa Ida, Toshimasa Matsuoka, Kenji Taniguchi, Hiroki Hihara

    IEICE Trans. Electron. (Japanese Edition)　Vol. J90-C　No. 7　p. 582-585　2007/07

    Publisher: IEICE

  87. Process variation compensation technique for voltage-controlled ring oscillator

    Guechol Kim, Keisuke Ueda, Sungwoo Cha, Tsukasa Ida, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING　Vol. 2　No. 2　p. 189-191　2007/03　Research paper (scientific journal)

  88. Analytical expression based design of a low-voltage FD-SOI CMOS low-noise amplifier

    Takao Kihara, Guechol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E90-A　No. 2　p. 317-325　2007/02　Research paper (scientific journal)

  89. In-situ evaluation of high frequency and high temperature characteristics of dielectric in high-density substrate

    Wu Youhong, Shinobu Kato, Wang DongDong, Toshimasa Matsuoka, Kenji Taniguchi

    IPACK 2007: PROCEEDINGS OF THE ASME INTERPACK CONFERENCE 2007, VOL 2　Vol. on CD-ROM　p. 725-728　2007　Research paper (international conference proceedings)

  90. Low Power-Consumption OP-Amp Using Adaptive Biasing for Switched Capacitor Circuit

    Tsukasa Ida, Tomoyuki Tanaka, Hiroaki Ishihara, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J89-C　No. 10　p. 645-647　2006/10

    Publisher: IEICE

  91. Small-signal and noise model of fully depleted silicon-on-insulator metal-oxide-semiconductor devices for low-noise amplifier

    Guechol Kim, Bunsei Murakami, Masaru Goto, Takao Kihara, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS　Vol. 45　No. 9A　p. 6872-6877　2006/09　Research paper (scientific journal)

  92. Accurate small-signal modeling of FD-SOI MOSFETs

    Guechol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Masaru Goto, Keisuke Ueda, Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E89-C　No. 4　p. 517-519　2006/04　Research paper (scientific journal)

  93. A Simple Noise Model of FD-SOI MOS Devices for Low Noise Amplifier

    G. Kim, B. Murakami, M. Goto, T. Kihara, K. Nakamura, Y. Shimizu, T. Matsuoka, K. Taniguchi

    Proc. IEEE International Meeting for Future of Electron Devices, Kansai, Apr. 24-26, 2006, Kyoto, Japan, pp. 59-60.　2006/04

    Publisher:

  94. Low Power-Consumption OP-Amp Using Adaptive Biasing for Switched Capacitor Circuit

    Tsukasa Ida, Tomoyuki Tanaka, Hiroaki Ishihara, Toshimasa Matsuoka, K. Taniguchi

    Proc. IEEE International Meeting for Future of Electron Devices, Kansai, Apr. 24-26, 2006, Kyoto, Japan, pp. 65-66.　2006/04

    Publisher:

  95. Erratum: Editorial (IEICE Electronic Express 3:3 (44))

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Electronics Express　Vol. 3　No. 4　2006/02/25　Research paper (scientific journal)

  96. Design of CMOS Low-Noise Amplifier Considering Noise andLinearity

    Takao Kihara, Guechol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Keisuke Ueda, Masaru Goto, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J89-C　No. 2　p. 72-75　2006/02

    Publisher: IEICE

  97. Analytical GMD formulas for mutual inductance calculation of multilevel interconnects

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 3　No. 3　p. 44-50　2006/02　Research paper (scientific journal)

  98. A study on the LO phase error compensation of GPS dual-band image reject mixer

    Masaki Haruoka, Yoshihiro Utsurogi, Toshimasa Matsuoka, Kenji Taniguchi

    Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)　Vol. 88　No. 12　p. 26-33　2005/12　Research paper (scientific journal)

    Publisher: IEICE

  99. Experimental study of integrated tunable transformer

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 2　No. 22　p. 561-565　2005/11　Research paper (scientific journal)

  100. Wired CDMA interface with adaptivity for interconnect capacitances

    Tsukasa Ida, Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E88-A　No. 10　p. 2702-2706　2005/10　Research paper (scientific journal)

  101. Low Power Analog Matched Filter with Offset-Cancellation for Direct Sequence Code Division Multiple Access

    Shinsaku Shimizu, Tomoyuki Tanaka, Tsukasa Ida, Jun Miyamoto, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J88-C　No. 8　p. 655-661　2005/08　Research paper (scientific journal)

    Publisher: IEICE

  102. CMOS front-end circuits of dual-band GPS receiver

    Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E88-C　No. 6　p. 1275-1279　2005/06　Research paper (scientific journal)

  103. Ultralow-power current reference circuit with low temperature dependence

    Tetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E88-C　No. 6　p. 1142-1147　2005/06　Research paper (scientific journal)

  104. A new inductance extraction technique of on-wafer spiral inductor based on analytical interconnect formula

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E88-C　No. 5　p. 824-828　2005/05　Research paper (scientific journal)

  105. A 1-V 120-MHz FD-SOI CMOS linear-in-dB variable gain amplifier

    Sungwoo Cha, Yoshiyuki Shimizu, Guechol Kim, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 2　No. 7　p. 249-253　2005/04　Research paper (scientific journal)

  106. Small-Signal RF Modeling of FD-SOI MOSFETs Including NQS Effect

    Gue Chol Kim, Bunsei Murakami, Yoshiyuki Shimizu, Masaru Goto, Sungwoo Cha, Keisuke Ueda, Takao Kihara, Yoshihiro Utsurogi, Toshimasa Matsuoka, Kenji Taniguchi

    Proc. IEEE International Meeting for Future of Electron Devices, Kansai, Apr. 11-13, 2005, Kyoto, Japan　p. 61-62　2005/04　Research paper (international conference proceedings)

    Publisher:

  107. 12GHz CMOS Modulator/Demodulator for Short-Range Wireless Communication Using ASK/CDMA Technique

    Sungwoo Cha, Hideyuki Furuya, Yoshiyuki Shimizu, Masaki Haruoka, Tsukasa Ida, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J88-C　No. 3　p. 187-194　2005/03　Research paper (scientific journal)

    Publisher: IEICE

  108. A CMOS IF variable gain amplifier with exponential gain control

    Sungwoo Cha, Tetsuya Hirose, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E88-A　No. 2　p. 410-415　2005/02　Research paper (scientific journal)

  109. A widely tunable Gm-C filter using tail current offset in two differential pairs

    Tomoyuki Tanaka, Sungwoo Cha, Shinsaku Shimizu, Tsukasa Ida, Hiroaki Ishihara, Toshimasa Matsuoka, Kenji Taniguchi, Akashi Sugimori, Hiroki Hihara

    Proceedings - IEEE International Symposium on Circuits and Systems　p. 812-815　2005　Research paper (international conference proceedings)

  110. A study on the LO phase error compensation of GPS dual-band image reject mixer

    Masaki Haruoka, Yoshihiro Utsurogi, Toshimasa Matsuoka, Kenji Taniguchi

    ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS　Vol. 88　No. 12　p. 26-33　2005　Research paper (scientific journal)

  111. A widely tunable Gm-C filter using tail current offset in two differential pairs

    T Tanaka, SW Cha, S Shimizu, T Ida, H Ishihara, T Matsuoka, K Taniguchi, A Sugimori, H Hihara

    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS　p. 812-815　2005　Research paper (international conference proceedings)

  112. High Speed CMOS DEMUX at Low Power Supply Voltage

    Shinsaku Simizu, Tomoyuki Tanaka, Tsukasa Ida, Jun Miyamoto, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J88-C　No. 1　p. 66-67　2005/01　Research paper (scientific journal)

    Publisher: IEICE

  113. Ultralow-power temperature-insensitive current reference circuit

    T Hirose, T Asai, Y Amemiya, T Matsuoka, K Taniguchi

    2005 IEEE SENSORS, VOLS 1 AND 2　Vol. 2005　p. 1205-1208　2005　Research paper (international conference proceedings)

  114. High speed and noise tolerant parallel bus interface for VLSI systems using multi bit code division multiple access

    Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E87C　No. 11　p. 1923-1927　2004/11　Research paper (scientific journal)

  115. Watch-dog circuit for quality guarantee with subthreshold MOSFET current

    Tetsuya Hirose, Ryuji Yoshimura, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E87C　No. 11　p. 1910-1914　2004/11　Research paper (scientific journal)

  116. CMOS demodulator for short-range wireless interconnection using ASK/CDMA technique

    Hideyuki Furuya, Sungwoo Cha, Yoshiyuki Shimizu, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E87A　No. 10　p. 2719-2721　2004/10　Research paper (scientific journal)

  117. Analysis of CMOS Quadrature-Coupled LC-VCO Sharing a Current Source

    Masaki Haruoka, Yoshihiro Utsurogi, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. J87-C　No. 10　p. 780-783　2004/10　Research paper (scientific journal)

    Publisher: The Institute of Electronics, Information and Communication Engineers

  118. A Study on Predistorter Using CMOS Process Technology

    Sungwoo Cha, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Trans. Electron. (Japanese Edition)　Vol. 87　No. 10　p. 777-779　2004/10　Research paper (scientific journal)

    Publisher: The Institute of Electronics, Information and Communication Engineers

  119. 入力周波数レンジ可変型CMOS電圧制御プリスケーラ

    春岡正起, 洞木吉博, 山本泰子, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C　Vol. 87　No. 9　p. 732-733　2004/09

    Publisher: 電子情報通信学会

  120. Watchdog Circuit for Product Degradation Monitor using Subthreshold MOS Current

    Tetsuya Hirose, Ryuji Yoshimura, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi

    Ext. Abst. International Conference on Solid State Devices and Materials, Sep. 14-17, 2004, Tokyo, Japan　Vol. Japan, pp. 150-151/,　p. 150-151　2004/09

  121. ミクサブロックを用いない電圧制御ダウンコンバータ

    春岡正起, 洞木吉博, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C　Vol. 87　No. 8　p. 662-663　2004/08

  122. Threshold voltage mismatch of FD-SOI MOSFETs

    Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E87C　No. 6　p. 1013-1014　2004/06　Research paper (scientific journal)

  123. Novel method of intrinsic characteristic extraction in lightly doped drain metal oxide semiconductor field effect transistors for accurate device modeling

    K Tada, Toshimasa Matsuoka, Kenji Taniguchi, K Maeda, T Sakai, Y Kubota, S Imai

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　Vol. 43　No. 3　p. 918-924　2004/03　Research paper (scientific journal)

  124. A new analytical inductance extraction technique of on-wafer spiral inductors

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE International Conference on Microelectronic Test Structures　p. 279-283　2004　Research paper (international conference proceedings)

  125. Drain current response delay of FD-SOI MOSFETs in RF operation

    Yoshiyuki Shimizu, Gue Chol Kim, Bunsei Murakami, Keisuke Ueda, Yoshihiro Utsurogi, Sungwoo Cha, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE Electronics Express　Vol. 1　No. 16　p. 518-522　2004　Research paper (scientific journal)

  126. Test structure for precise measurement of MOSFET matching properties

    Yoshiyuki Shimizu, Mitsuo Nakamura, Toshimasa Matsuoka, Kenji Taniguchi

    ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS　Vol. 87　No. 3　p. 21-28　2004　Research paper (scientific journal)

  127. Low Power 1 V-Operation 630 MHz Frequency Divider Circuits

    YAMAMOTO Yasuko, MATSUOKA Toshimasa, TANIGUCHI Kenji

    IEICE Trans. Electron. (Japanese Edition)　Vol. 87　No. 1　p. 192-194　2004/01　Research paper (scientific journal)

    Publisher: The Institute of Electronics, Information and Communication Engineers

  128. A dual-band image-reject mixer for GPS with 64dB image rejection

    Y Utsurogi, M Haruoka, T Matsuoka, K Taniguchi

    ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE　p. 541-542　2004/01　Research paper (international conference proceedings)

  129. A CMOS transmitter for short-range wireless communication using ASK/CDMA technique

    Sungwoo Cha, Hideyuki Furuya, Yoshiyuki Shimizu, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi

    IMFEDK 2004 - International Meeting for Future of Electron Devices, Kansai　Vol. Japan, pp. 93-94/,　p. 93-94　2004　Research paper (international conference proceedings)

    Publisher: Institute of Electrical and Electronics Engineers Inc.

  130. Separation of Self-Heating and Kink Effects on Transient Characteristics of Polycrystalline Silicon Thin-Film Transistors

    TADA K.

    IEICE Trans. Electron. (Japanese Edition)　Vol. J87-C　No. 1　p. 186-187　2004/01

    Publisher: IEICE

  131. A dual-band image-reject mixer for GPS with 64dB image rejection

    Masaki Haruoka, Yoshihiro Utsurogi, Toshimasa Matsuoka, Kenji Taniguchi

    2003 IEEE TOPICAL CONFERENCE ON WIRELESS COMMUNICATION TECHNOLOGY　Vol. CD-ROM　p. 168-169　2003/11　Research paper (international conference proceedings)

  132. A CMOS Predistorter Using a P+/N-well Junction Diode with a Bias Feed Resistor

    Sungwoo Cha, Toshimasa Matsuoka, Kenji Taniguchi

    Asia-Pacific Microwave Conference, Nov. 4-7, 2003, Seoul, Korea　Vol. 1　p. 77-80　2003/11

  133. 高精度品質保証期限モニター回路

    吉村隆治, 廣瀬哲也, 井戸徹, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C　Vol. 86　No. 9　p. 1041-1043　2003/09

    Publisher: 電子情報通信学会

  134. Low-Power Data Transferring System with the Parallel Bus Using a CDMA Technique

    IEICE Trans. Electron. (Japanese Edition)　Vol. Vol. J86-C, No. 8, pp.878-885/　2003/08　Research paper (scientific journal)

    Publisher: IEICE

  135. An Analytical Circuit Model of Stacked Spiral Inductors

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    International Meeting for Future of Electron Devices, Kansai, July 16-18, 2003, Osaka, Japan　p. 47-48　2003/07　Research paper (international conference proceedings)

  136. Test Structure for MOSFETs' Matching Measurement

    Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    International Meeting for Future of Electron Devices, Kansai, July 16-18, 2003, Osaka, Japan　p. 45-46　2003/07　Research paper (international conference proceedings)

  137. MOSFETのマッチング特性の高精度評価のためのテスト回路

    清水由幸, 中村光男, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C　Vol. Vol. J86-C, No. 7, pp.726-733/　2003/07

    Publisher: 電子情報通信学会

  138. A new analog correlator circuit for DS-CDMA wireless applications

    MAR Eltokhy, BK Tan, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E86-A　No. 5　p. 1294-1301　2003/05　Research paper (scientific journal)

  139. 有線多値CDMAバスの機能レベル解析

    高橋賢, Tan Boon Keat, 岩村宏, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C　Vol. 86　No. 2　p. 177-185　2003/02

  140. Multiple-bit parallel-CDMA technique for an on-chip interface featuring high data transmission rate, small latency and high noise tolerance

    Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    ESSCIRC 2003: PROCEEDINGS OF THE 29TH EUROPEAN SOLID-STATE CIRCUITS CONFERENCE　p. 639-642　2003　Research paper (international conference proceedings)

  141. Parallel bus systems using code-division multiple access technique

    Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II　Vol. pp. 240-243　p. 240-243　2003　Research paper (international conference proceedings)

  142. A voltage-controlled CMOS phase-shift oscillator for short-range wireless communications

    Mitsuo Nakamura, Toshimasa Matsuoka, Kenji Taniguchi

    ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS　Vol. 86　No. 9　p. 24-30　2003　Research paper (scientific journal)

  143. A Low Power Analog Matched-Filter with Smart Sliding Correlation

    Mostafa A. R. Eltokhy, Shinsakll Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEEJ Transactions on Electronics, Information and Systems　Vol. 123　No. 11　p. 1970-1976　2003　Research paper (scientific journal)

    Publisher: IEEJ

  144. A New Method on Reducing Phase Noise of X-band Dielectric Resonator Oscillator

    Sungwoo Cha, Hong-goo Cho, Toshimasa Matsuoka, Kenji Taniguchi

    Asia-Pacific Microwave Conference, Nov. 19-22, 2002, Kyoto, Japan　Vol. 1　p. 405-408　2002/11

  145. Modeling and Simple Simulation Method of Stacked Spiral Inductors

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    International Conference on Solid-State Devices and Materials, Sep. 17-20, 2002, Nagoya, Japan, pp. 24-25.　Vol. Japan, pp. 24-25　2002/09

  146. Low-Power Consumption Analog-Type Matched-Filter for DS-CDMA Wireless Application

    Mostafa A, R. Eltokhy, Boon-Keat Tan, Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEEJ 6th International Analog VLSI Workshop, Sep. 11-12, 2002, Singapore, pp. 165-170.　Vol. 11-12, Singapore, pp. 165-170　2002/09

  147. A low-voltage SOI-CMOS LC-tank VCO with double-tuning technique using lateral P-N junction variable capacitance

    Mitsuo Nakamura, Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E85C　No. 7　p. 1428-1435　2002/07

  148. 短距離無線通信用電圧制御CMOS移相発振回路に関する研究

    中村光男, 松岡俊匡, 谷口研二

    電子情報通信学会論文誌C,　Vol. 85　No. 6　p. 449-454　2002/06

    Publisher: 電子情報通信学会

  149. A study of robustness and coupling-noise immunity on simultaneous data transfer CDMA bus interface

    M Takahashi, BK Tan, H Iwamura, Toshimasa Matsuoka, Kenji Taniguchi

    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV, PROCEEDINGS　p. 611-614　2002　Research paper (international conference proceedings)

  150. A 3.4-mW 128-MHz analog correlator for DS-CDMA wireless applications

    MAR Eltokhy, BK Tan, T Matsuoka, K Taniguchi

    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS　Vol. pp. 377-380　p. 377-380　2002　Research paper (international conference proceedings)

  151. CMOS phase-shift VCO for short-range wireless communication

    Mitsuo Nakamura, Toshimasa Matsuoka, Kenji Taniguchi

    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS　Vol. IV　p. 405-408　2002　Research paper (international conference proceedings)

  152. Test structure for precise statistical characteristics measurement of MOSFETs

    Yoshiyuki Shimizu, Mitsuo Nakamura, Toshimasa Matsuoka, Kenji Taniguchi

    ICMTS 2002:PROCEEDINGS OF THE 2002 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES　p. 49-54　2002　Research paper (international conference proceedings)

  153. Dynamically programmable parallel processor (DPPP): A novel reconfigurable architecture with simple program interface

    Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS　Vol. E84D　No. 11　p. 1521-1527　2001/11　Research paper (scientific journal)

  154. Error Analysis on Simultaneous Data Transfers in CDMA Wired Interface

    Hiroshi Iwamura, Ryuji Yoshimura, Boon-Keat Tan, Toshimasa Matsuoka, Kenji Taniguchi

    International Conference on Solid-State Devices and Materials , Sep. 25-28, 2001, Tokyo, Japan, pp. 408-409.　Vol. Japan, pp. 408-409　2001/09

  155. An Efficient Data Transmission Interface for VLSI Systems using Code-Division Multiple Access Technique

    Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi

    Proc. 27th European Solid-State Circuits Conference, pp. 176-179, 2001.　Vol. pp. 176-179,/,　p. 176-179　2001/09

  156. A Balanced Switched-Capacitor Charge Pump Circuit for CDMA Bus Interface

    Boon-Keat Tan, Ryuji Yoshimura, Yoshiyuki Shimizu, Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi

    IEEJ 5th International Analog VLSI Workshop, May 14-15, 2001, Bangkok, Tailand　p. 138-143　2001/05　Research paper (international conference proceedings)

  157. A novel dynamically programmable arithmetic array (DPAA) processor for digital signal processing

    Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES　Vol. E84A　No. 3　p. 741-747　2001/03

  158. A novel dynamically Programmable Arithmetic Array using code division multiple access bus

    BK Tan, R Yoshimura, T Matsuoka, K Taniguchi

    ICECS 2001: 8TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS I-III, CONFERENCE PROCEEDINGS　Vol. pp. 913-916　p. 913-916　2001　Research paper (international conference proceedings)

  159. Compact device model for partially depleted SOI-MOSFETs - For simulation of transient drain current arising from the floating body effects

    Y Fujii, R Yoshimura, T Matsuoka, K Taniguchi

    SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2001　Vol. pp. 234-237　p. 234-237　2001

  160. DS-CDMA Wired Bus for Parallel Processing Systems

    Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi

    International Symposium on Advanced Analog CMOS Circuits, 18 Dec., 2000, Tokyo, Japan.　p. 39-44　2000/12　Research paper (international conference proceedings)

  161. Dynamically Programmable Parallel Processor (DPPP): A Novel Reconfigurable Architecture with Simple Program Interface

    Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi

    26th European Solid-State Circuits Conference, pp. 316-319, Sep. 19-21, 2000, Stockholm, Sweden.　2000/09

  162. Adaptive Aperture Phase Detection Technique Capable of Dividerless Locking for Low Power Phase Locked Loops

    Toshimasa Matsuoka, Tomohiro Sano, Kenji Taniguchi

    IEEJ 4th International Analog VLSI Workshop, pp. 10-15, June 2-3, 2000, Stockholm, Sweden.　2000/06

  163. DS-CDMA Wired Bus with Simple Interconnection Topology for Parallel Processing System LSIs

    Ryuji Yoshimura, Tan Boon Keat, Toru Ogawa, Shingo Hatanaka, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 370-371　Vol. pp. 370-371　p. 370-371　2000/02

  164. Ultra Low Power Supply Voltage (0.3V) Operation with Extreme High Speed Using Bulk Dynamic Threshold Voltage MOSFET (B-DTMOS) with Advanced Fast-Signal Transmission Shallow Well

    A. Shibata, T. Matsuoka, S. Kakimoto, H. Kotaki, M. Nakano, K. Adachi, K. Ohta, N. Hashizume

    1998 Symposium on VLSI Technology, pp. 76-77.　Vol. pp. 76-77　1998/06

  165. Hot-carrier-induced degradation of N2O-oxynitrided gate oxide NMOSFET's

    T Matsuoka, S Tauchi, H Ohtsuka, K Taniguchi, C Hamaguchi, S Kakimoto, K Uda

    IEEE TRANSACTIONS ON ELECTRON DEVICES　Vol. 43　No. 9　p. 1364-1373　1996/09　Research paper (scientific journal)

  166. Characteristics of 2.8 nm gate oxynitride MOSFETs for low-voltage operating LSI

    T Matsuoka, M Nakano, H Kotaki, S Hayashida, S Kakimoto, K Adachi, K Sugimoto, S Morishita, T Fukushima, Y Sato

    SHARP TECHNICAL JOURNAL　No. 65　p. 11-16　1996/08　Research paper (scientific journal)

  167. Influence of N2O oxynitridation on interface trap generation in surface-channel p-channel metal oxide semiconductor field effect transistors

    T Matsuoka, S Taguchi, K Taniguchi, C Hamaguchi, S Kakimoto, K Uda

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　Vol. 35　No. 2B　p. 887-891　1996/02　Research paper (scientific journal)

  168. Novel low leakage and low resistance titanium salicide technology with recoil nitrogen achieved by silicidation after ion implantation through contamination-restrained oxygen free LPCVD-nitride layer (SICRON)

    H Kotaki, M Nakano, S Hayashida, T Matsuoka, S Kakimoto, A Nakano, K Uda, Y Sato

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　Vol. 35　No. 2B　p. 1090-1096　1996/02　Research paper (scientific journal)

  169. Novel bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced isolation (SITOS) and gate to shallow-well contact (SSS-C) processes for ultra low power dual gate CMOS

    H Kotaki, S Kakimoto, M Nakano, T Matsuoka, K Adachi, K Sugimoto, T Fukushima, Y Sato

    IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996　Vol. pp. 459-462, Dec. 8-11,/,　p. 459-462　1996　Research paper (international conference proceedings)

  170. DEGRADATION OF INVERSION LAYER ELECTRON-MOBILITY DUE TO INTERFACE TRAPS IN METAL-OXIDE-SEMICONDUCTOR TRANSISTORS

    Toshimasa MATSUOKA, Shigenari TAGUCHI, QDM KHOSRU, Kenji TANIGUCHI, C HAMAGUCHI

    JOURNAL OF APPLIED PHYSICS　Vol. 78　No. 5　p. 3252-3257　1995/09　Research paper (scientific journal)

  171. Influence of N2O-Oxynitridation on Interface Trap Generation in Surface-Channel PMOSFETs

    Toshimasa Matsuoka, Shgenari Taguchi, Kenji Taniguchi, Chihiro Hamaguchi, Seizou Kakimoto, Keiichoro Uda

    Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials　Vol. pp.884-886　p. 884-886　1995/08

  172. THICKNESS DEPENDENCE OF FURNACE N2O-OXYNITRIDATION EFFECTS ON BREAKDOWN OF THERMAL OXIDES

    Toshimasa MATSUOKA, Shigenari TAGUCHI, Kenji TANIGUCHI, Chihiro HAMAGUCHI, Seizou KAKIMOTO, Junkou TAKAGI

    IEICE TRANSACTIONS ON ELECTRONICS　Vol. E78C　No. 3　p. 248-254　1995/03　Research paper (scientific journal)

  173. NOVEL OXYGEN-FREE TITANIUM SILICIDATION (OFS) PROCESSING FOR LOW-RESISTANCE AND THERMALLY STABLE SALICIDE (SELF-ALIGNED SILICIDE) IN DEEP-SUBMICRON DUAL-GATE CMOS (COMPLEMENTARY METAL-OXIDE SEMICONDUCTORS)

    H KOTAKI, M NAKANO, S HAYASHIDA, S KAKIMOTO, K MITSUHASHI, J TAKAGI

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　Vol. 34　No. 2B　p. 776-781　1995/02　Research paper (scientific journal)

  174. Novel Low Leakage and Low Resistance Titanium Salicide Technology with Recoil Nitrogen Achieved by Silicidation after Ion Implantation through Contamination-Restrained Oxygen Free LPCVD-Nitride Layer (SICRON)

    KOTAKI H., NAKANO M., HAYASHIDA S., MATSUOKA T., KAKIMOTO S., NAKANO A., UDA K., SATO Y.

    Extended Abstracts of the 1995 Solid State Devices and Materials, Aug. 21-24, 1995, Osaka, Japan.　Vol. 1995　p. 85-87　1995

  175. Direct tunneling N2O gate oxynitrides for low-voltage operation of dual gate CMOSFETs

    T Matsuoka, S Kakimoto, M Nakano, H Kotaki, S Hayashida, K Sugimoto, K Adachi, S Morishita, K Uda, Y Sato, M Yamanaka, T Ogura, J Takagi

    INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST　Vol. D. C., pp. 851-854/,　p. 851-854　1995　Research paper (international conference proceedings)

  176. Novel Oxygen Free Titanium Silicidation (OFS) Processing for Low Resistance and Thermally Stable SALICIDE in Deep Submicron Dual Gate CMOS

    Extended Abstracts of the 1994 Solid State Devices and Materials, Aug. 23-26, 1994, Yokohama.　p. 628-630　1994

  177. Weakly Allowed Optical Transition due to the Zone-folding Effect in (GaAs)n/(AlAs)n Superlattices

    Toshimasa Matsuoka, Takeshi Nakazawa, Tomoki Ohya, Tetsuya Miyatake, Masahito Yamaguchi, Kenji Taniguchi, Chihiro Hamaguchi, Hiromu Kato, Yasutaka Watanabe

    Surface Science　Vol. 267　No. 1-3　p. 470-473　1992/03　Research paper (scientific journal)

  178. Weakly allowed optical transition due to the zone-folding effect in (GaAs)n/(AlAs)n superlattices

    Toshimasa Matsuoka, Takeshi Nakazawa, Tomoki Ohya, Tetsuya Miyatake, Masahito Yamaguchi, Kenji Taniguchi, Chihiro Hamaguchi, Hiromu Kato, Yasutaka Watanabe

    Surface Science　Vol. 267　No. 1-3　p. 470-473　1992　Research paper (scientific journal)

  179. Zone-folding Effect in Short-period (GaAs)n/(AlAs)n Superlattices with n in the Range 3-15

    Toshimasa Matsuoka, Takeshi Nakazawa, Tomoki Ohya, Kenji Taniguchi, Chihiro Hamaguchi, Hiromu Kato, Yasutaka Watanabe

    Phys. Rev.　Vol. 43　No. 14　p. 11798-11805　1991/03　Research paper (scientific journal)

  180. OPTICAL-PROPERTIES OF SHORT-PERIOD SUPERLATTICES

    C HAMAGUCHI, T MATSUOKA, K TANIGUCHI

    GRANULAR NANOELECTRONICS　Vol. 251　p. 463-489　1991　Research paper (international conference proceedings)

  181. PHOTOREFLECTANCE AND PHOTOLUMINESCENCE STUDY OF SHORT-PERIOD (GAAS)N/(ALAS)N SUPERLATTICES WITH N = 1-15

    C HAMAGUCHI, T NAKAZAWA, T MATSUOKA, T OHYA, K TANIGUCHI, H FUJIMOTO, K IMANISHI, H KATO, Y WATANABE

    SUPERLATTICES AND MICROSTRUCTURES　Vol. 9　No. 4　p. 449-452　1991　Research paper (scientific journal)

  182. TEMPERATURE-DEPENDENCE OF ELECTRON-MOBILITY IN INGAAS/INAIAS HETEROSTRUCTURES

    T MATSUOKA, E KOBAYASHI, K TANIGUCHI, C HAMAGUCHI, S SASA

    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS　Vol. 29　No. 10　p. 2017-2025　1990/10　Research paper (scientific journal)

  183. ZONE-FOLDING EFFECT IN SHORT-PERIOD (GAAS)N/(ALAS)N SUPERLATTICES WITH N = 1 - 15

    C HAMAGUCHI, T NAKAZAWA, T MATSUOKA, T OHYA, K TANIGUCHI, H FUJIMOTO, K IMANISHI, H KATO, Y WATANABE

    20TH INTERNATIONAL CONFERENCE ON THE PHYSICS OF SEMICONDUCTORS, VOLS 1-3　p. 1033-1036　1990　Research paper (international conference proceedings)

  184. DIRECT AND INDIRECT TRANSITIONS IN (GAAS)N/(ALAS)N SUPERLATTICES WITH N=1-15

    C HAMAGUCHI, T NAKAZAWA, T MATSUOKA, T OHYA, K TANIGUCHI, H FUJIMOTO, K IMANISHI, H KATO, Y WATANABE

    INTERNATIONAL CONFERENCE ON MODULATION SPECTROSCOPY　Vol. 1286　p. 280-290　1990　Research paper (international conference proceedings)

  185. TEMPERATURE-DEPENDENCE OF THE ENERGY-GAP OF (GAAS)N/(ALAS)N SUPERLATTICES

    T NAKAZAWA, T MATSUOKA, T OHYA, K TANIGUCHI, C HAMAGUCHI, H KATO, Y WATANABE

    INTERNATIONAL CONFERENCE ON MODULATION SPECTROSCOPY　Vol. 1286　p. 244-254　1990　Research paper (international conference proceedings)

  186. MONTE-CARLO SIMULATION OF HOT-ELECTRONS IN INALAS/INGAAS HETEROJUNCTIONS

    E KOBAYASHI, T MATSUOKA, K TANIGUCHI, C HAMAGUCHI

    SOLID-STATE ELECTRONICS　Vol. 32　No. 12　p. 1845-1849　1989/12

  187. MONTE-CARLO STUDY OF HOT-ELECTRON TRANSPORT IN AN INGAAS/INALAS SINGLE HETEROSTRUCTURE

    Eisuke KOBAYASHI, Chihiro HAMAGUCHI, Toshimasa MATSUOKA, Kenji TANIGUCHI

    IEEE TRANSACTIONS ON ELECTRON DEVICES　Vol. 36　No. 10　p. 2353-2360　1989/10　Research paper (scientific journal)

  188. Monte Carlo simulation of hot electrons in InAlAs/InGaAs heterojunctions

    E. Kobayashi, T. Matsuoka, K. Taniguchi, C. Hamaguchi

    Solid State Electronics　Vol. 32　No. 12　p. 1845-1849　1989　Research paper (scientific journal)

Misc. 30

  1. Application of Machine Learning for Easy-to-Design Precision A/D Converter

    Toshimasa Matsuoka

    SYSTEM, CONTROL AND INFORMATION　Vol. 64　No. 9　p. 355-360　2020/09　Article, review, commentary, editorial, etc. (scientific journal)

    Publisher: ISCIE

  2. Invited Talk : SAR A/D Converter Using Stochastic Conversion and Machine-Learning Error Correction

    Vol. 117　No. 167　p. 95-100　2017/07/31

    Publisher: 電子情報通信学会

  3. Invited Talk : SAR A/D Converter Using Stochastic Conversion and Machine-Learning Error Correction

    Vol. 41　No. 25　p. 95-100　2017/07

    Publisher: 映像情報メディア学会

  4. Wearable High-Precision Biomedical-Information Sensor with Machine Learning

    Toshimasa Matsuoka, Kyoko Ikoma

    Vol. 68　No. 3　p. 35-41　2016/07　Article, review, commentary, editorial, etc. (other)

    Publisher: 生産技術振興協会

  5. A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices (集積回路)

    BAE Jungnam, RADHAPURAM Saichandrateja, JO Ikkyun, WANG Weimin, KIHARA Takao, MATSUOKA Toshimasa

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報　Vol. 115　No. 477　p. 217-222　2016/03/02

    Publisher: 電子情報通信学会

  6. Study of Novel Floating-Gate Oxide Semiconductor Memory Using Indium-Gallium-Zinc Oxide for Low-Power System-on-Panel Applications (vol 52, 094101, 2013)

    Yoshimitsu Yamauchi, Yoshinari Kamakura, Yousuke Isagi, Toshimasa Matsuoka, Satoshi Malotaux

    JAPANESE JOURNAL OF APPLIED PHYSICS　Vol. 53　No. 8　2014/08　Other

  7. Low-Power Zero-IF Full-segment ISDB-T CMOS Tuner with Tenth-order Baseband Filters (vol 57, pg 403, 2011)

    Takatsugu Kamata, Kazunori Okui, Masahiko Fukasawa, Toshimasa Matsuoka, Kenji Taniguchi

    IEEE TRANSACTIONS ON CONSUMER ELECTRONICS　Vol. 57　No. 4　p. 1986-1986　2011/11　Other

  8. スマート集積化センシング・システムに向けたCMOS 集積回路技術

    松岡俊匡

    大阪大学低温センターだより　Vol. 154　p. 15-19　2011/04　Article, review, commentary, editorial, etc. (bulletin of university, research institution)

    Publisher: 大阪大学低温センター

  9. Design of Read-Out Circuit for Gas Sensor Array with Kelvin Technique

    CHOJI Hiroaki, IM Jongpil, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Vol. 2009　No. 14　p. 71-76　2009/01/21

  10. C-12-43 UWB Noise Canceling Differential CMOS LNA Exploiting Transformers

    Takobe Isao, Kihara Takao, Matsuoka Toshimasa, Taniguchi Kenji

    Proceedings of the Society Conference of IEICE　Vol. 2008　No. 2　p. 112-112　2008/09/02

    Publisher: The Institute of Electronics, Information and Communication Engineers

  11. C-12-65 LOW-VOLTAGE TRANSFORMER FOLDED CMOS LOW-NOISE AMPLIFIER

    Kihara Takao, Park Hae Ju, Takobe Isao, Yamashita Fumiaki, Mastuoka Toshimasa, Taniguchi Kenji

    Proceedings of the IEICE General Conference　Vol. 2008　No. 2　p. 155-155　2008/03/05

    Publisher: The Institute of Electronics, Information and Communication Engineers

  12. C-12-24 Low-Voltage Techniques for Wireless CMOS Analog ICs

    Matsuoka Toshimasa, Taniguchi Kenji

    Proceedings of the Society Conference of IEICE　Vol. 2007　No. 2　p. 79-79　2007/08/29

    Publisher: The Institute of Electronics, Information and Communication Engineers

  13. C-12-24 Pseudo Differential Low Noise Amplifier Using Valiable Bias Circuit

    Goto Masaru, Kihara Takao, Kim Guechol, Matsuoka Toshimasa, Taniguchi Kenji

    Proceedings of the Society Conference of IEICE　Vol. 2006　No. 2　p. 85-85　2006/09/07

    Publisher: The Institute of Electronics, Information and Communication Engineers

  14. Design and implementation of a low-voltage FD-SOI CMOS low-noise amplifier

    KIHARA Takao, KIM Guechol, GOTO Masaru, NAKAMURA Keiji, SHIMIZU Yoshiyuki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Vol. 2006　No. 52　p. 11-16　2006/06/22

  15. Analytical GMD formulas for mutual inductance calculation of multilevel interconnects (vol 3, pg 44, 2006)

    Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi

    IEICE ELECTRONICS EXPRESS　Vol. 3　No. 4　p. 80-80　2006/02　Other

  16. Accurate Small-Signal RF Modeling of FD-SOI MOSFET

    MURAKAMI Bunsei, KIM GueChol, KIHARA Takao, GOTO Masaru, MATSUOKA Toshimasa, TANIGUCHI Kenji

    IEICE technical report　Vol. 105　No. 492　p. 89-93　2005/12/14

    Publisher: The Institute of Electronics, Information and Communication Engineers

  17. Wired CDMA Interface with Adaptivity for Interconnect Capacitances

    IDA Tsukasa, SHIMIZU Shinsaku, MATSUOKA Toshimasa, TANIGUCHI Kenji

    IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences　Vol. 88　No. 10　p. 2702-2706　2005/10/01

    Publisher: The Institute of Electronics, Information and Communication Engineers

  18. C-12-23 Ultralow-Power Reference Circuit for Subthreshold MOS LSIs

    Hirose Tetsuya, Matsuoka Toshimasa, Taniguchi Kenji, Asai Tetsuya, Amemiya Yoshihito

    Proceedings of the IEICE General Conference　Vol. 2005　No. 2　p. 86-86　2005/03/07

    Publisher: The Institute of Electronics, Information and Communication Engineers

  19. CMOS Demodulator for Short-Range Wireless Interconnection Using ASK/CDMA Technique

    FURUYA Hideyuki, CHA Sungwoo, SHIMIZU Yoshiyuki, HARUOKA Masaki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences　Vol. 87　No. 10　p. 2719-2721　2004/10/01

    Publisher: The Institute of Electronics, Information and Communication Engineers

  20. A CMOS Linear-in-dB Variable Gain Amplifier Using Bias Offset

    CHA Sungwoo, HIROSE Tetsuya, HARUOKA Masaki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    ITE technical report　Vol. 28　No. 38　p. 53-57　2004/07/14

    Publisher: 映像情報メディア学会

  21. Watch-dog Circuit for Quality Guarantee with Subthreshold Current

    HIROSE Tetsuya, YOSHIMURA Ryuji, IDO Toru, MATSUOKA Toshimasa, TANIGUCHI Kenji, ASAI Tetsuya, AMEMIYA Yoshihito

    ITE technical report　Vol. 28　No. 38　p. 59-64　2004/07/14

    Publisher: 映像情報メディア学会

  22. A CMOS Proportional-to-Absolute Temperature Voltage Reference Operating in Weak Inversion

    MIYAMOTO Jun, HIROSE Tetsuya, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Technical report of IEICE. ICD　Vol. 104　No. 175　p. 31-34　2004/07/07

    Publisher: The Institute of Electronics, Information and Communication Engineers

  23. A CMOS Linear-in-dB Variable Gain Amplifier Using Bias Offset

    CHA Sungwoo, HIROSE Tetsuya, HARUOKA Masaki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Technical report of IEICE. ICD　Vol. 104　No. 175　p. 53-57　2004/07/07

    Publisher: The Institute of Electronics, Information and Communication Engineers

  24. Watch-dog Circuit for Quality Guarantee with Subthreshold Current

    HIROSE Tetsuya, YOSHIMURA Ryuji, IDO Toru, MATSUOKA Toshimasa, TANIGUCHI Kenji, ASAI Tetsuya, AMEMIYA Yoshihito

    Technical report of IEICE. ICD　Vol. 104　No. 175　p. 59-64　2004/07/07

    Publisher: The Institute of Electronics, Information and Communication Engineers

  25. A CMOS Predistorter Using a P+/N Junction Diode with a Bias Feed Resistor

    CHA Sungwoo, MATSUOKA Toshimasa, TANIGUCHI Kenji

    ITE technical report　Vol. 27　No. 49　p. 65-70　2003/09/12

    Publisher: 映像情報メディア学会

  26. Design of Low-Voltage Low-Power Prescaler Using 0.35μm CMOS

    YAMAMOTO Yasuko, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Vol. 2003　No. 31　p. 13-16　2003/01/24

  27. A Low-Voltage SOI-CMOS LC-Tank VCO with Double-Tuning Technique Using Lateral P-N Junction Variable Capacitance

    NAKAMURA Mitsuo, SHIMA Hideki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    IEICE Transactions on Electronics　Vol. 85　No. 7　p. 1428-1435　2002/07/01

    Publisher: The Institute of Electronics, Information and Communication Engineers

  28. RF Characteristics of Spiral Inductors Fabricated with SOI-CMOS Process

    SHIMA Hideki, MATSUOKA Toshimasa, TANIGUCHI Kenji

    Vol. 2001　No. 42　p. 39-42　2001/06/29

  29. Design of CMOS Ring Oscillator

    GUAN Yew Lim, MATSUOKA Tosimasa, TANIGUCHI Kenji

    Vol. 2000　No. 38　p. 63-65　2000/06/29

  30. フオトリフレクタンス法による半導体超格子の評価

    松岡俊匡, 谷口研二, 浜口智尋

    光学　Vol. 20　No. 1　p. 26-27　1991/01　Article, review, commentary, editorial, etc. (scientific journal)

    Publisher: 光学

Publications 4

  1. Integrated Circuits

    Masahiko Yoshimoto, Takeshi Fujino, Toshimasa Matsuoka, Tetsuya Hirose, Hiroshi Kawaguchi, Kazutoshi Kobayashi

    Ohmsha　2013/09　Textbook, survey, introduction

    ISBN: 9784274214271

  2. Analog Electronic Circuits

    Makoto Nagata, Jun Ohta, Kazutoshi Kobayashi, Tetsuya Hirose, Toshimasa Matsuoka

    Ohmsha　2013/03　Textbook, survey, introduction

    ISBN: 9784274213441

  3. CMOS RFデバイス技術

    松岡俊匡

    EDリサーチ社　2005/11　Scholarly book

  4. Optical Properties of Short Period Superlattices

    NATO Advanced Study Institute Services: Granular Nanoelectronics, edited by D. K. Ferry (Plenum Press, New York).　1991

Works 19

  1. 素子特性ばらつきの統計性に基づく微弱信号検出の線形性改善方法とその実現方式の探究

    2011 -

  2. 自己整合微粒子操作基盤技術創出のための超低電圧集積回路の研究

    2010 -

  3. 雑音統計を利用した微弱信号検出感度向上のためのアナログ集積回路技術の開発

    2010 -

  4. 低電圧微細CMOSプロセス対応に向けた無線通信用低電力RF・アナログ回路要素技術の開発

    2009 -

  5. 雑音統計を利用した微弱信号検出感度向上のためのアナログ集積回路技術の開発

    2009 -

  6. 自己整合微粒子操作基盤技術創出のための超低電圧集積回路の研究

    2009 -

  7. 低電圧微細CMOSプロセス対応に向けた無線通信用低電力RF・アナログ回路要素技術の開発

    2008 -

  8. 自己整合微粒子操作基盤技術創出のための超低電圧集積回路の研究

    2008 -

  9. 雑音統計を利用した微弱信号検出感度向上のためのアナログ集積回路技術の開発

    2008 -

  10. 低電圧微細CMOSプロセス対応に向けた無線通信用低電力RF・アナログ回路要素技術の開発

    2007 -

  11. 雑音統計を利用した微弱信号検出感度向上のためのアナログ集積回路技術の開発

    2007 -

  12. 雑音統計を利用した微弱信号検出感度向上のためのアナログ集積回路技術の開発

    2006 -

  13. SOI IF回路に関する研究

    2004 -

  14. 不揮発性メモリ用絶縁膜に関する研究

    2004 -

  15. シリコン中ホットキャリアの研究

    2004 -

  16. 高周波アナログ回路の研究

    2004 -

  17. 高周波対応プリント基板の開発

    2004 -

  18. CMOSプロセスにおける低位相雑音の実現

    2004 -

  19. FD-SOI MOSFETを用いた高周波回路の設計技術の開発

    2004 -

Institutional Repository 87

Content Published in the University of Osaka Institutional Repository (OUKA)

  1. Behavior-level Analysis of a Successive Stochastic Approximation Analog-to-Digital Conversion System for Multi-channel Biomedical Data Acquisition

    Tani Sadahiro, Matsuoka Toshimasa, Hirai Yusaku, Kurata Toshifumi, Tatsumi Keiji, Asano Tomohiro, Ueda Masayuki, Kamata Takatsugu

    Vol. E100-A　No. 10　p. 2073-2085　2017/10/01

  2. A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices

    Bae Jungnam, Radhapuram Saichandrateja, Jo Ikkyun, Wang Weimin, Kihara Takao, Matsuoka Toshimasa

    Vol. 99-C　No. 4　p. 431-439　2016/04/01

  3. An offset distribution modification technique of stochastic flash ADC

    Asano Tomohiro, Hirai Yusaku, Tani Sadahiro, Yano Shinya, Jo Ikkyun, Matsuoka Toshimasa

    Vol. 13　No. 6　p. 1-10　2016

  4. A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator

    Bae Jungnam, Radhapuram Saichandrateja, Jo Ikkyun, Kihara Takao, Matsuoka Toshimasa

    Vol. E98-C　No. 12　p. 1179-1186　2015/12/01

  5. ANALYSIS OF A CONTROLLER-BASED ALL-DIGITAL PHASE-LOCKED LOOP

    Radhapuram Saichandrateja, Bae Jungnam, Jo Ikkyun, Wang Weimin, Matsuoka Toshimasa

    Vol. 15　No. 1　p. 57-73　2015/09

  6. A Delta-Sigma ADC with Stochastic Quantization

    Hirai Yusaku, Yano Shinya, Matsuoka Toshimasa

    Vol. 8　p. 123-130　2015/08

  7. A DYNAMIC LATCHED COMPARATOR WITH BUILT-IN OFFSET CALIBRATION

    Cui Ji, Tani Sadahiro, Ohara Kenji, Hirai Yusaku, Matsuoka Toshimasa

    Vol. 14　No. 2　p. 105-115　2015/06

  8. Accurate Extraction of Effective Gate Resistance in RF MOSFET

    Jo Ikkyun, Matsuoka Toshimasa

    Vol. 6　No. 5　p. 143-151　2015/05/22

  9. A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing

    Bae Jungnam, Radhapuram Saichandrateja, Jo Ikkyun, Kihara Takao, Matsuoka Toshimasa

    Vol. 6　No. 5　p. 136-142　2015/05/22

  10. A low-power CMOS programmable frequency divider with novel retiming scheme

    Radhapuram Saichandrateja, Bae Jungnam, Jo Ikkyun, Kihara Takao, Matsuoka Toshimasa

    Vol. 12　No. 6　2015/03

  11. RF front-end architecture for a triple-band CMOS GPS receiver

    Jo Ikkyun, Bae Jungnam, Matsuoka Toshimasa, Ebinuma Takuji

    Vol. 46　No. 1　p. 27-35　2015/01

  12. DIGITAL IMPLEMENTATION OF THIRD HARMONIC DISTORTION REDUCTION IN FOURTH-ORDER ΔΣ D/A CONVERTER

    Ohara Kenji, Kamata Takatsugu, Wang Jun, Matsuoka Toshimasa

    Vol. 13　No. 2　p. 91-97　2014

  13. Low-power wireless on-chip microparticle manipulation with process variation compensation

    Kishiwada Yasushi, Iwasaki Hirosuke, Ueda Shun, Dei Yoshiaki, Miyawaki Yusuke, Matsuoka Toshimasa

    Vol. 10　No. 13　2013/07

  14. Design of triple-band CMOS GPS receiver RF front-end

    Jo Ikkyun, Bae Jungnam, Matsuoka Toshimasa, Ebinuma Takuji

    Vol. 10　No. 7　2013/04

  15. A low-power technique for pipelined ADCs with programmable gain amplification

    Okura Tetsuro, Okura Shunsuke, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 10　No. 1　2013/01

  16. An Analysis of Capacitor Mismatch in Segment of MDAC at Pipelined ADC with Merged Capacitor Switching Technique

    Okura Tetsuro, Okura Shunsuke, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J95-C　No. 10　p. 235-239　2012/10

  17. A Low Power Technique for Programmable Gain Amplifier with Controllable input/output Transconductance and Compensation Capacitor

    Okura Tetsuro, Okura Shunsuke, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J95-C　No. 7　p. 131-138　2012/07

  18. A CMOS LOW-DROPOUT REGULATOR WITH A DYNAMIC-BIASED GAIN STAGE

    Wang Honglai, Dai Yujie, Zhang Xiaoxing, Lv Yingjie, Matsuoka Toshimasa, Wang Jun, Taniguchi Kenji

    Vol. 7　No. 2　p. 67-81　2012/04

  19. A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators

    Kanemoto Daisuke, Tamura Yu, Indika U. K. Bogoda A., Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 9　No. 6　p. 572-579　2012/03

  20. Wireless on-chip microparticle manipulation using pulse-driven dielectrophoresis

    Ueda Shun, Miyawaki Yusuke, Wang Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 9　No. 1　p. 16-22　2012/01

  21. A Rotated Partial Data Weighted Averaging Technique for Delta-Sigma Digital-to-Analog Converters

    Tamura Yu, Kanemoto Daisuke, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J95-C　No. 1　p. 9-17　2012/01

  22. A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation

    Sato Hisayasu, Maruyama Takaya, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E94-C　No. 8　p. 1311-1319　2011/08

  23. スマート集積化センシング・システムに向けたCMOS 集積回路技術

    松岡 俊匡

    大阪大学低温センターだより　Vol. 154　p. 14-19　2011/04

  24. Design of a 500-MS/s stochastic signal detection circuit using a non-linearity reduction technique in a 65-nm CMOS process

    Ham Hyunju, Matsuoka Toshimasa, Wang Jun, Taniguchi Kenji

    Vol. 8　No. 6　p. 353-359　2011/03

  25. Analysis on Influence of Capacitor Switching in Digitally-Controlled Oscillator Using Behavior-Level Simulation

    Tsuruyama Genki, Ham Hyunju, Wang Jung, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J94-A　No. 2　p. 145-148　2011/02

  26. Process Variation Compensation Technique for 0.5V Body-Input Comparator

    Wang Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J93-C　No. 9　p. 326-327　2010/09

  27. Design of Image Rejection Filter for Wideband TV Tuner IC

    Kamata Takatsugu, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J93-C　No. 6　p. 195-206　2010/06

  28. Design of a low-voltage CMOS mixer based on variable load technique

    Wei Baolin, Dai Yujie, Wang Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 7　No. 7　p. 473-479　2010/04

  29. Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation

    Wang Jun, Kihara Takao, Ham Hyunju, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E93-A　No. 2　p. 356-366　2010/02/01

  30. A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier

    Kihara Takao, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E93-C　No. 2　p. 187-199　2010/02

  31. Characteristics Compensation of Ultra-Low-Voltage CMOS Digital Circuits

    Yasue Kazuhiro, Wang Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J93-C　No. 2　p. 75-77　2010/02

  32. A DESIGN FOR ULTRA-LOW-VOLTAGE CMOS DIGITAL CIRCUITS WITH PERFORMANCE CHARACTERISTICS COMPENSATION

    Wang Jun, Yasue Kazuhiro, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 5　No. 1　p. 59-65　2010

  33. Analytical design of a 0.5V 5GHz CMOS LC-VCO

    Yamashita Fumiaki, Matsuoka Toshimasa, Kihara Takao, Takobe Isao, Park Hae-Ju, Taniguchi Kenji

    Vol. 6　No. 14　p. 1025-1031　2009/07

  34. A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier

    Kihara Takao, Park Hae-Ju, Takobe Isao, Yamashita Fumiaki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E92-C　No. 4　p. 564-575　2009/04

  35. Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems

    Ham Hyunju, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E92-A　No. 4　p. 1012-1018　2009/04

  36. Design of A 0.5V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources

    Wang Jun, Lee Tuck-Yang, Kim Dong-Gyou, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E91-C　No. 8　p. 1375-1378　2008/08

  37. A novel approach to implement summing function for feedforward Δ-Σ AD modulator

    Wang Jun, Ido Toru, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 5　No. 12　p. 457-463　2008/06

  38. Clock Recovery Circuit with Wideband Input Bitrate Range

    Ida Tsukasa, Tanaka Tomoyuki, Nakao Satoshi, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J91-C　No. 6　p. 349-356　2008/06

  39. 生体センシング用途向け超低消費電力ΔΣモジュレータ

    Ida Tsukasa, Tanaka Tomoyuki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J90-C　No. 10　p. 662-670　2007/10

  40. Design of Wideband Tuning VCO for TV Receiver System

    Kamata Takatsugu, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J90-C　No. 9　p. 634-641　2007/09

  41. A Study on Tuning Technique for Variable Bandwidth G_m-C Filter

    Tanaka Tomoyuki, Ida Tsukasa, Matsuoka Toshimasa, Taniguchi Kenji, Hihara Hiroki

    Vol. J90-C　No. 7　p. 582-585　2007/07

  42. Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier

    Kihara Takao, Kim Guechol, Goto Masaru, Nakamura Keiji, Shimizu Yoshiyuki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E90-A　No. 2　p. 317-325　2007/02

  43. Low Power-Consumption OP-Amp Using Adaptive Biasing for Switched Capacitor Circuit

    Ida Tsukasa, Tanaka Tomoyuki, Ishihara Hiroaki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J89-C　No. 10　p. 645-647　2006/10

  44. Accurate Small-Signal Modeling of FD-SOI MOSFETs

    Kim Guechol, Shimizu Yoshiyuki, Murakami Bunsei, Goto Masaru, Ueda Keisuke, Kihara Takao, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E89-C　No. 4　p. 517-519　2006/04

  45. Analytical GMD formulas for mutual inductance calculation of multilevel interconnects

    Shima Hideki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 3　No. 3　p. 44-50　2006/02

  46. Design of CMOS Low-Noise Amplifier Considering Noise and Linearity

    Kihara Takao, Kim Guechol, Shimizu Yoshiyuki, Murakami Bunsei, Ueda Keisuke, Goto Masaru, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J89-C　No. 2　p. 72-75　2006/02

  47. Experimental Study of Integrated Tunable Transformer

    Shima Hideki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 2　No. 22　p. 561-565　2005/11

  48. Wired CDMA Interface with Adaptivity for Interconnect Capacitances

    Ida Tsukasa, Shimizu Shinsaku, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E88-A　No. 10　p. 2702-2706　2005/10

  49. Low Power Analog Matched Filter with Offset-Cancellation for Direct Sequence Code Division Multiple Access

    Shimizu Shinsaku, Tanaka Tomoyuki, Ida Tsukasa, Miyamoto Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J88-C　No. 8　p. 655-661　2005/08

  50. CMOS Front-end Circuits of Dual-band GPS Receiver

    Utsurogi Yoshihiro, Haruoka Masaki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E88-C　No. 6　p. 1275-1279　2005/06

  51. Ultralow-Power Current Reference Circuit with Low Temperature Dependence

    Hirose Tetsuya, Matsuoka Toshimasa, Taniguchi Kenji, Asai Tetsuya, Amemiya Yoshihito

    Vol. E88-C　No. 6　p. 1142-1147　2005/06

  52. A New Inductance Extraction Technique of On-wafer Spiral Inductor Based on Analytical Interconnect Formula

    Shima Hideki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E88-C　No. 5　p. 824-828　2005/05

  53. A 1-V 120-MHz FD-SOI CMOS Linear-in-dB Variable Gain Amplifier

    Cha Sungwoo, Shimizu Yoshiyuki, Kim Guechol, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 2　No. 7　p. 249-253　2005/04

  54. 12GHz CMOS Modulator/Demodulator for Short-Range Wireless Communication Using ASK/CDMA Technique

    Cha Sungwoo, Furuya Hideyuki, Shimizu Yoshiyuki, Haruoka Masaki, Ida Tsukasa, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J88-C　No. 3　p. 187-194　2005/03

  55. A CMOS IF Variable Gain Amplifier with Exponential Gain Control

    Cha Sungwoo, Hirose Tetsuya, Haruoka Masaki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E88-A　No. 2　p. 410-415　2005/02

  56. High Speed CMOS DEMUX at Low Power Supply Voltage

    Shimizu Shinsaku, Tanaka Tomoyuki, Ida Tsukasa, Miyamoto Jun, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J88-C　No. 1　p. 66-67　2005/01

  57. Drain Current Response Delay of FD-SOI MOSFETs in RF Operation

    Shimizu Yoshiyuki, Kim Gue Chol, Murakami Bunsei, Ueda Keisuke, Utsurogi Yoshihiro, Cha Sungwoo, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 1　No. 16　p. 518-522　2004/11

  58. High Speed and Noise Tolerant Parallel Bus Interface for VLSI Systems Using Multi Bit Code Division Multiple Access

    Shimizu Shinsaku, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E87-C　No. 11　p. 1923-1927　2004/11

  59. Watch-dog Circuit for Quality Guarantee with Subthreshold MOSFET Current

    Hirose Tetsuya, Yoshimura Ryuji, Ido Toru, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E87-C　No. 11　p. 1910-1914　2004/11

  60. A Studv on Predistorter Using CMOS Process Technology

    Cha Sungwoo, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J87-C　No. 10　p. 777-779　2004/10

  61. CMOS Demodulator for Short-range Wireless Interconnection Using ASK/CDMA Technique

    Furuya Hideyuki, Cha Sungwoo, Shimizu Yoshiyuki, Haruoka Masaki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E87-A　No. 10　p. 2719-2721　2004/10

  62. Analysis of CMOS Quadrature-Coupled LC-VCO Sharing a Current Source

    Haruoka Masaki, Utsurogi Yoshihiro, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J87-C　No. 10　p. 780-783　2004/10

  63. Wide Tuning Range CMOS Voltage-Controlled Prescaler

    Haruoka Masaki, Utsurogi Yoshihiro, Yamamoto Yasuko, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J87-C　No. 9　p. 732-733　2004/09

  64. Voltage-Controlled Downconverter without Mixer Block

    Haruoka Masaki, Utsurogi Yoshihiro, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J87-C　No. 8　p. 662-663　2004/08

  65. Threshold Voltage Mismatch of FD-SOI MOSFETs

    Shimizu Yoshiyuki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E87-C　No. 6　p. 1013-1014　2004/06

  66. A new analytical inductance extraction technique of on-wafer spiral inductors

    Shima Hideki, Matsuoka Toshimasa, Taniguchi Kenji

    p. 279-283　2004/03

  67. Separation of Self-Heating and Kink Effects on Transient Characteristics of Polycrystalline Silicon Thin-Film Transistors

    Tada Kenshi, Hirose Tetsuya, Matsuoka Toshimasa, Taniguchi Kenji, Maeda Kazuhiro, Sakai Tamotsu, Kubota Yasushi, Imai Shigeki

    Vol. J87-C　No. 1　p. 186-187　2004/01

  68. Low Power 1 V-Operation 630 MHz Frequency Divider Circuits

    Yamamoto Yasuko, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J87-C　No. 1　p. 192-194　2004/01

  69. A Study on the LO Phase Error Compensation of GPS Dual-Band Image-Reject Mixer

    Haruoka Masaki, Utsurogi Yoshihiro, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J86-C　No. 11　p. 1177-1183　2003/11

  70. High Precision CMOS Watch-Dog Circuit for Quality Guarantee Using Subthreshold Current

    Yoshimura Ryuji, Hirose Tetsuya, Ido Toru, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J86-C　No. 9　p. 1041-1043　2003/09

  71. Low-Power Data Transferring System with the Parallel Bus Using a CDMA Technique

    Shimizu Shinsaku, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J86-C　No. 8　p. 878-885　2003/08

  72. Test Structure for Presise Measurement of MOSFET's Matching Properties

    Shimizu Yoshiyuki, Nakamura Mitsuo, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J86-C　No. 7　p. 726-733　2003/07

  73. A New Analog Correlator Circuit for DS-CDMA Wireless Applications

    Eltokhy Mostafa A. R., Tan Boon-Keat, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E86-A　No. 5　p. 1294-1301　2003/05

  74. Behavior-Level-Analysis in Simultaneous Data Transfer CDMA Bus Interface

    Takahashi Masaru, Tan Boon Keat, Iwamura Hiroshi, Matsuoka Toshimasa, Taniguchi Kenji

    電子情報通信学会論文誌C　Vol. J86-C　No. 2　p. 177-185　2003/02

  75. A Low Power Analog Matched-Filter with Smart Sliding Correlation

    Eltokhy Mostafa A. R., Shimizu Shinsaku, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. 123　No. 11　p. 1970-1976　2003/01

  76. A Low-Voltage SOI-CMOS LC-Tank VCO with Double-Tuning Technique Using Lateral P-N Junction Variable Capacitance

    Nakamura Mitsuo, Shima Hideki, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E85-C　No. 7　p. 1428-1435　2002/07

  77. Voltage Controlled CMOS Phase-Shift Oscillator for Short-Range Wireless Communication

    Nakamura Mitsuo, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. J85-C　No. 6　p. 449-454　2002/06

  78. Test structure for precise statistical characteristics measurement of MOSFETs

    Shimizu Yoshiyuki, Nakamura Mitsuo, Matsuoka Toshimasa, Taniguchi Kenji

    p. 49-54　2002/04

  79. Dynamically Programmable Parallel Processor (DPPP) : A Novel Reconfigurable Architecture with Simple Program Interface

    Tan Boon-Keat, Yoshimura Ryuji, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E84-D　No. 11　p. 1521-1527　2001/11

  80. A Novel Dynamically Programmable Arithmetic Array (DPAA) Processor for Digital Signal Processing

    Tan Boon-Keat, Yoshimura Ryuji, Matsuoka Toshimasa, Taniguchi Kenji

    Vol. E84-A　No. 3　p. 741-747　2001/03

  81. DS-CDMA wired bus with simple interconnection topology for parallel processing system LSIs

    Yoshimura Ryuji, Tan Boon Keat, Ogawa Toru, Hatanaka Shingo, Matsuoka Toshimasa, Taniguchi Kenji

    p. 370-371　2000/02

  82. Degradation of inversion layer electron mobility due to interface traps in metaloxide‐semiconductor transistors

    Matsuoka Toshimasa, Taguchi Shigenari, Khosru Deen Quazi Mohd, Taniguchi Kenji, Hamaguchi Chihiro

    Vol. 78　No. 5　p. 3252-3257　1995/09

  83. Thickness Dependence of Furnace N2O-Oxynitridation Effects on Breakdown of Thermal Oxides

    Matsuoka Toshimasa, Taguchi Shigenari, Taniguchi Kenji, Hamaguchi Chihiro, Kakimoto Seizou, Takagi Junkou

    Vol. E78-C　No. 3　p. 248-254　1995/03

  84. Temperature dependence of energy gap of (GaAs)_n/(AlAs)_n Superlattices

    Nakazawa Takeshi, Matsuoka Toshimasa, Ohya Tomoki, Taniguchi Kenji, Hamaguchi Chihiro, Kato Hiroshi, Watanabe Yasutaka

    p. 244-254　1990/08/01

  85. Direct and indirect Transitions in (GaAs)_n/(AlAs)_n Superlattices with n=1-15

    Hamaguchi Chihiro, Nakazawa Takeshi, Matsuoka Toshimasa, Ohya Tomoki, Taniguchi Kenji, Fujimoto Hidetoshi, Imanishi Kenji, Kato Hiroshi, Watanabe Yasutaka

    p. 280-290　1990/08/01

  86. A CAPACITOR-LESS TRANSIENT-RESPONSE-IMPROVED CMOS LOW-DROPOUT REGULATOR

    Wang Benchuan, Matsuoka Toshimasa, Wang Honglai, Dai Yujie, Wang Jun, Jo Ikkyun

    Vol. 15　p. 35-56

  87. 極薄ゲート酸化膜MOSFETにおけるホットキャリア効果に関する研究

    Matuoka Toshimasa